The third-order intercept point (IP3) of a receiver is a parameter often used to characterize the distortion introduced by such circuits. In this test or simulation, two closely spaced tones (F_delta apart) are input to the receiver, which would (ideally) produce just the same two tones at the output, but translated to the IF frequency band by the local oscillator. Due to nonlinearities, third-order tones (really fourth-order tones if you count the LO) also appear at the output. These tones are F_delta above and below the two desired tones and usually cannot be filtered out. As the input power level of the two tones is increased, the third-order tones at the output increase at a 3 dB/dB rate, whereas the desired tones at the output only increase at a 1 dB/dB rate. The IP3 point is the hypothetical output signal level at which the third-order tones would reach the same amplitude level as the desired input tones. This IP3 point may also be referred to the input by subtracting the conversion gain. The IP3 point is extrapolated from a simulation of the third-order terms when relatively low-level tones are input. The IP3 point may be used to determine the high end of a receiver's dynamic range.

The higher the RF signal frequencies and the lower the IF, the less efficient time-domain simulators (like SPICE) become for this type of simulation. This is because you need a small time step to adequately sample the RF or LO as well as a long stop time to simulate a full period of the IF. You need a steady-state waveform at the output to get a decent spectrum to extrapolate the IP3 point.

With the harmonic balance simulator, you specify the frequencies you want included in the simulation, and it directly gives you the steady-state spectrum. Simulation speed is not affected by the frequencies or spacing between tones. You would specify three fundamental frequencies, for the LO and each of the two RF inputs, as well as how many harmonics of each fundamental to include and the maximum order of mixing products. The number of frequency terms and the size of the circuit will determine how much memory (and time) is required for a solution. As long as the simulator requires less memory than your computer's RAM, the simulation time should be reasonably fast (possibly minutes). Otherwise the simulation process will have to be swapped in and out of RAM, greatly increasing the time required.

A potentially useful alternative is the Envelope simulator, which combines time and frequency-domain techniques. With the Envelope simulator, you specify one or more analysis frequencies, the same way you would with harmonic balance, and the simulation time step. The “envelope bandwidth” of the simulation is equal to 1/(simulation time step). As long as any signal source that you define or mixing term of interest is within this bandwidth, which is centered on each analysis frequency, then the signal source and mixing term will be included in the simulation. Terms that appear within half the envelope bandwidth above DC will be included in the simulation, also.

So the Envelope simulator is well-suited for direct-conversion receiver IP3 simulations. The RF input tones are within the envelope bandwidth centered on the LO. The downconverted IF and intermodulation distortion tones fall into the half envelope bandwidth above 0 Hz. (The second-order intermodulation distortion terms will also appear within this frequency band, which will enable you to compute the second-order intercept point as well.) Because of this, you only have to specify one analysis frequency for the LO, as well as its harmonics. This leads to a small memory requirement and a fast simulation time. Even simulating a receiver with a transistor-level VCO, a frequency divider, mixers and an LNA (total of 93 FETs) required only about 83 seconds and 119 Mbytes of RAM for two input power levels. This simulation time excludes the 47 seconds required for the transient initial guess. This initial guess is required only because of the frequency divider, and only must be run once. The figure shows typical input and output spectra, and conversion gain and IP3 calculations using the markers. You may download an ADS example (RFIC_IQdemod_wFETs_prj from http://eesof.tm.agilent.com/applications/latest.html#ads_latest) or an RFDE example (RFIC_IQdemod5_2G.zip, from http://eesof.tm.agilent.com/applications/latest.html#rfde_latest) showing this simulation setup.

The Envelope simulator also allows you to simulate your circuits with modulated signals, which will enable you to measure things like EVM and ACPR, if you want to go beyond IP3.

1. Lee, Thomas H., The Design of CMOS Radio-Frequency Integrated Circuits, Cambridge University Press, 1998, pp. 295-297.

2. Cripps, Steven C., RF Power Amplifiers for Wireless Communications, Artech House, 1999, pp. 181-190.

Andy Howard is application engineer at Agilent EEsof EDA, Santa Rosa, Calif.