The semiconductor industry is facing increasingly difficult challenges as a result of a few fundamental trends. Increased demand for lower cost devices and faster time to market drives semiconductor manufacturers further down the process geometry ladder, where the cost of moving to each new node is in excess of $1 billion. Further, the new genre of devices is shrinking, becoming more complex and operating on less power. Associated with these pressures are increasingly complex test and measurement challenges that require deeper technical knowledge and extensive bandwidth of the associated personnel.

Until today, the test engineers have managed to rack and stack bolt-together solutions with multiple PCs, instruments and interfaces attached to a prober of choice. Test engineers have not needed an implicit understanding of environmental control, cable parasitics and instrumentation. The configured system of off-the shelf parts could handle the measurement requirements that were being faced. Since throughput was not a challenge test engineers had the bandwidth to handle the technical complexities of their measurement system along with their device knowledge. That has changed.

Smaller geometries, lower operating voltages, increased device complexity, and need for greatly increased throughput directly impact on-wafer device characterization and process development. Decreased operating voltages require measurements at or often below the noise floor of existing test equipment and smaller geometries make it difficult to discern intended signals from intrinsic device behavior. Small pads are much more difficult to align with probes and to keep aligned over time and temperature. External factors, such as mechanical vibration and electro-magnetic interference (EMI) represent a much larger portion of the ever-smaller voltages and currents in test devices and thus limit test accuracy and repeatability. Obtaining difficult measurements like wafer-level reliability, RF and flicker noise under these circumstances with bolt-together measurements systems is tremendously challenging.

Adding to the pressure, the throughput demands on these engineers are ever-increasing, driving them to test more wafers, faster. The coupling of devices to the measurement instrumentation is starting to become so intricate that increasingly deep knowledge of interplay of the test environment in addition to device physics is often needed.

Bolt-together test systems are no longer sufficient for the complex and sensitive test processes required by today’s devices. Look at the example of Flicker noise testing. It requires an extremely low noise floor, exceptional low frequency performance, and close attention to measurement speed. In Flicker noise measurements every inch of cable length corresponds to increased capacitance, which in turn impacts the available bandwidth of the system. Furthermore, the associated parasitics of the instruments, the prober and cabling system require careful design in order to assure consistent measurement performance. These variables are extremely difficult to control in a system pieced together from instruments and equipment from multiple vendors.

Today’s most challenging measurements require fully integrated test systems, completely supported by a single vendor, designed from the ground up by experts, and optimized and pre-configured for a specific test category. In the case of Flicker noise testing, an integrated system would include smart partitioning that contains and isolates electrical noise with shielding and physical location while minimizing parasitic capacitance and inductance with careful electronic design and cable management. Power and ground schemes, critical elements for any precise measurement, can be architected with the entire system in mind and controlled as a deliverable of the solution. Application software must be part of this integrated system to manage the complexity of the test and its environment while providing an effective user interface. Finally, and perhaps most importantly, a single-vendor, integrated measurement system assures semiconductor manufacturers of complete support, installation and training, maintenance, and the confidence of an accurate, repeatable measurement.

Akshay Gupta is vice president of R&D and marketing, Engineering Products Division, Cascade Microtech. He joined Cascade as director of marketing in April 2004. Prior to that, Akshay was product general manager at Iomega where he started the Network Storage Systems Division. He has also served as the director of product marketing for InFocus and Proxima during the merger. He managed their systems integration, home entertainment roadmaps and product efforts. Akshay has also held product, technical marketing and sales positions in projection display industry. He holds a BA in Mathematics and Physics from Whitman College and an MBA from Portland State University.

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