Driven by compact handsets and portable electronics, integrated passive components continue to exploit advances in semiconductor processes to reduce size with higher performance at lower cost.

For example, Murata has developed chip coils with extremely small form factors, the LQP02T series. Designated the 01005EIA size, 0.4 mm × 0.2 mm × 0.2 mm, these devices have a minimum Q factor of 10, according to Jonathan Davis, product manager for EMI Filters and Chip Inductors. While the devices are true inductors, and, therefore, non-polarized, there are polarity markings on the package to ensure proper board mounting. This is because the height and width of this extremely small package are equal. In addition to the smaller package, this device provides tighter inductive tolerances. The inductance range is from 0.4 nH to 10 nH, with inductance tolerance of ±0.3 nH for values up to 5.6 nH, and ±5% for the remaining values to 10 nH.

This reduced form factor has been applied to Murata's BLM02A series of chip ferrite beads. The devices in this series respectively provide impedances of 10Ω, 70Ω and 100Ω at 100 MHz for EMI suppression. According to Davis, using multilayer technology, high levels of EMI suppression can be achieved in a small package.

Other types of integrated passives not only combine multiple circuit elements, but perform multiple circuit functions. For example, one emerging type of integrated passive device combines protection against ESD and EMI, such as Vishay's VEMI series of EMI filter arrays with integrated ESD protection diodes. Jochen Krieger, applications engineer, small signal products, stated that the structure of these devices, represented schematically in Figure 4, is implemented with a standard fabrication process.

The reverse-biased zener diodes in this product work very well as capacitors, provided, of course, that the applied voltage is below the breakdown value. In these devices, the inductance between the diode junction capacitances and the ground plane has to be as low as possible to support the high-frequency operation. Packages with long leads have higher inductance compared to leadless packages, such as the LLP package type. The 3 dB corner frequency for these devices is between 60 MHz and 100 MHz, with surge immunity greater than 30 kV. Because these integrated passives are implemented in a conventional process, Vishay is also able to integrate active devices together with passives in the Vishay passive and active class of devices (VPAD).

However, just as there are situations where active RFICs that perform significantly different RF functions are fabricated on different process technologies, it may be desirable in certain applications to fabricate passive integrated components as stand-alone devices having a unique fabrication processes. One such process is Infineon's copper-silicon process, used by Infineon's HiPAC line of integrated passives. This process enables resistors, capacitors and inductors for high-frequency applications in the 800 MHz to 5.6 GHz range, such as cellular, wireless LAN, Bluetooth and UWB, and includes on-die ESD protection to more than 2 kV.

According to Paul Patterson, Infineon's North American marketing manager for RF passives and small-signal discrete products, the Q factor for copper inductors of up to 30 nH in this process is approximately 30 at 2 GHz. High-Q (200 at 2 GHz) capacitors up to 40 pF for filter circuits are implemented with metal-in-metal (MIM) structures, and the ESD protection is provided by trench capacitors. The number and size of circuit elements are limited more by economic factors than by physics. Infineon estimates the use of a device with 20 or more circuit elements will provide sufficient cost advantages to merit the use of these integrated passives in most applications.

The main advantages of this process are board space savings, improved reliability, manufacturing yield and associated costs from delivered lot-to-lot stable pre-tested integrated passive devices, which enable a reduction in device insertions and number of parts to be inventoried. The process competes with printing electronic devices on laminate substrates. Another application for the process is four-layered copper balum transformers.

As with their RFIC counterparts, integrated passives are also seeing innovations in packaging. One of the most recent is the reverse-geometry packaging used in the WK series of multilayer ceramic capacitors (MLCCs) from Taiyo Yuden.

In these devices, the length-to-width aspect ratio of the packaging has been reversed, with the electrodes extending along the longer edges of the capacitors. By its very nature, this design increases capacitance, while reducing equivalent series inductance (ESL). It also reduces the equivalent series resistance (ESR), as well as the resistance of the PC board connections to the device. The available voltage ratings for these capacitors is 4 V, 6.3 V and 16 V. According to Yoshiyuki Takahashi, a manager at the New Products Promotion Department, this technology is approximately 10 years old. However, only recently has market demand for reduced form factors in mobile devices been high enough to merit the development of a commercial product.

Given this type of innovation, single-element discrete passive components may never be completely displaced by fully integrated electronics. However, just as with the first ICs developed in the late 1950s, the distinguishing characteristic of integrated passives is not the specific design or the number of circuit elements, but the precise and effective manufacturing process used to make them. This fabrication technology could potentially displace conventional manufacturing techniques presently used to produce passive RF components.

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