This VSWR protection mechanism was used to protect a GSM PA under heavy mismatch. A directional coupler and a dual detector were used to detect the reflection coefficient. When the VSWR is more than the safe limit, the protection circuit gets triggered lowering the amplifier's output power by adjusting the voltage on its power-control pin.

The VSWR detection circuit, shown in Figure 6, consists of a directional coupler, a dual log detector, and a clamp circuit. The directional coupler between the HPA and the load couples a sample of incident and reflected waves on to the coupled and reflected ports, which are then fed to a dual log detector such as the ADL5519 or AD8302. A directional coupler with 30 dB coupling factor and greater than 15 dB directivity at 900 MHz was used to position the coupled and reflected signals within the detection range of the detector.

The power from the reflected port (PD) of the directional coupler, which is proportional to the VSWR, is fed to one of the input channels of the detector. The power from the coupled port (PC), which is independent of the VSWR, is fed to the other input channel. As shown in Equation 3, the dual log detector computes the logarithmic subtraction of these two signals, resulting in a difference output VDIFF proportional to the ratio of the reflected and coupled signals that is equivalent to the reflection coefficient. The equations are valid for couplers with high directivity (>40 dB). With lower directivities the measured VDIFF output will be a function of the phase of the VSWR. A directivity of 15 dB was found to be sufficient for distinguishing between the VSWR of 1.5 and 3.0 without having to worry about the phase of the VSWR.

where,
VDIFF is the difference output (V) of the dual log amp detector

VSLP is the slope (mV/dB) of the log amp detector

PINT is the X-axis intercept (dBm) of the VOUT vs. PIN curve (see Figure 4)

VLVL is a constant common-mode voltage level (V)

ZIN is the input impedance of the detector

The op-amp-based clamp circuit triggers when the difference output (VDIFF) of the log detector increases by a predefined voltage level (VREF), indicating a high VSWR condition. Once a high VSWR condition is detected, the HPA is powered down into a safe operating mode using its power control voltage port (VAPC). POUT vs. VAPC characteristic of the PA should be considered while deciding on the VREF level. In this working model, the VREF level was set to trigger the clamp circuit for values of VSWR > 1.5:1.

The GSM PA shown in Figure 7 gets irreversibly damaged when exposed to VSWR > 4:1 at POUT = 34.5 dBm at 900 MHz. In an experimental test of the detector circuit conducted using these conditions, a similar GSM PA was functional even after withstanding a VSWR > 15:1, as shown in Figure 8. These results indicate that the apparatus was able to protect a power amplifier under severe mismatch conditions.

Anil Rachakonda is a RFIC design engineer in the Advanced Linear Products division of Analog Devices Inc. He obtained his masters degree in electrical engineering from Arizona State University, Tempe, AZ. He can be reached via e-mail at anil.rachakonda@analog.com.

Larry Hawkins is a senior RF applications engineer in the Advanced Linear Products division of Analog Devices Inc. He obtained his bachelor's degree in electrical engineering from the University of Utah. He can be reached via e-mail at larry.hawkins@analog.com.

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