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Remote sensing satellites transmit digitally modulated signals of different data rates in different PSK modulation schemes. The ground stations meant for receiving these signals are designed with the feed and front-end system broad enough to accommodate the reception of signals anywhere in the assigned spectrum.

A separate data rate specific demodulator has to be used for each satellite-payload, if mission specific design is used. This increases the system complexity and cost. A demodulator with multimission capabilities, therefore, provides a low cost solution to the problem of receiving multiple high data rate signals at different data rates in QPSK/UQPSK/BPSK schemes.

The design of the coherent carrier recovery circuit for the demodulation of suppressed carrier PSK signals is very critical and involves several performance considerations and trade offs. Various carrier regeneration schemes have been developed and implemented in this multimission demodulator design for optimal performance in different applications.

This article briefly describes these carrier recovery schemes, which are suitably configured to cater for multimission requirements of a remote sensing satellite ground station. The effect of the filtering and nonlinearity before carrier-referencing PLL used for the carrier recovery has also been analyzed in detail.

The simplified configuration of the multimission demodulator used for the remote sensing satellite data reception is shown in figure 1.

The demodulator consists of an input AGC amplifier and coherent carrier recovery and coherent detector circuits as its major constituents. The IF-signal-plus-noise is bandpass filtered, automatic gain control amplified and routed in parallel to the carrier recovery circuit and the coherent data detector.

The carrier recovery circuit regenerates the coherent reference for the demodulation and is routed to the data detector. The coherent data detector extracts the in-phase (I) and quadra-phase (Q) data streams, which are lowpass filtered and fed to the corresponding plug-in of the bit-synchronizer and signal conditioner (BSSC) unit.

The BSSC unit recovers the coherent symbol timing for synchronizing the data to the symbol timing clock. The outputs of this unit are the required serial data and bit rate clock.

While the demodulator part of the subsystem employs a common circuitry for different data rates of reception, different bit-synchronizer plug-in modules are required for different data rates.

The coherent carrier recovery from received modulated signal involves the modulation wipe-off through the nonlinear process, and recovering the coherent carrier through a phase lock loop (PLL). The adaptability of this circuit for use in multimission data reception faces several design trade-offs in overall performance.

Before considering the design options for carrier regeneration, a review of the effects of nonlinearity on the signal-to-noise-ratio (SNR) of the regenerated coherent reference is provided. The discussion is mainly focused on BPSK carrier recovery for the simplicity though the analysis holds good for other PSK schemes as well. The analysis will be the basis on which the hardware implementation is done and the circuit is realized.

The received modulated signal is filtered and passed through an even-law nonlinearity (or times M multiplier) prior to phase referencing in a PLL.

The phase jitter and the static phase error on the regenerated carrier are the deciding factors of the detection efficiency of the demodulator and are affected by the filtering and the nonlinear effects of the carrier recovery process before the PLL. The fundamental expression relating the mean squared phase jitter in a PLL preceded by squaring (for BPSK demodulation) is given as

σ_φ² = 1 / (ρ_L . S_L) (1)

Where σ_φ² is the mean squared output phase jitter of the recovered carrier, ρ_L is the SNR in the loop and S_L is the squaring loss.

It is evident from equation (1) that the squaring loss S_L controls the quality of the recovered carrier and requires thorough analysis to minimize its effect.

The filtering and nonlinear processing of the input modulated data waveform with noise results in three components of the signal-plus-noise entering into the PLL used for carrier phase referencing.

They can be listed as:

• The carrier component at 2W_C (BPSK mode);
• The noise component N_sq representing S×N and N×N products; and
• The component representing the data self noise n_s(t).

While the carrier component 2W_C, after squaring, is the one to which the PLL has to lock on and track, the variance of the loop tracking error caused by squaring and self-noise will result in additional jitter in the recovered carrier and, consequently, the reduction in the SNR in the loop.

After the multiplication, while the excess noise contributes to the squaring loss by resulting in S×N and N×N cross products, the filtering effect on the data waveform also contributes to squaring loss through data self noise. Hence, the squaring loss can be related to the signal E_b/N_o, the filter noise bandwidth and shape. Lindsey and Simon have shown that for a particular filter type and bit waveform, an optimal filter bandwidth relative to the bit rate exists for each E_b/N_o. Putting together all the above factors, an expression for squaring loss can be derived as under

S_L = [(h₁/α_∞) + {(h₂T_b/α_∞)/(2 E_b/N_o)}]^-1 (2)

Where, T_b is the bit duration and α is B_IF / R_s where R_s is the symbol rate and B_IF is the double sided IF bandwidth.

h1 = 1/2π ∫_-∞^+∞ S_m (ω) | H(ω) |⁴ dω (3)

h2 = 1/2π ∫_-∞^+∞ | H(ω) |⁴ dω (4)

where H(ω) is the low pass equivalent of the input band pass filter transfer function and S_m(ω) is the spectrum of the modulated signal.

It is seen from the above relation that if the input pre filter to the nonlinearity is too wide relative to 1/T_b, h₁ and h₂ will increase, while if it is too narrow a decreases and both of these increase the squaring loss.

However, it can be deduced that after carrier regeneration, we need to consider only the power spectral density of the noise centered on 2W_C at the output of the squarer. We can neglect S×S product, such as the data self noise, considering the input filter bandwidth being much wider than the bit rate of the modulated signal for multimission operations. The output signal-to-noise-ratio (S/N)_out of the squarer is given by

(S/N)_out = (1/4) (B_IF/B_L) (C/N) / [1 + {(1\2) (C/N)^-1}] (5)

Where B_L is the noise bandwidth of PLL, C/N is the input C/N of the squarer, and B_IF is the noise bandwidth of the pre filter to nonlinearity.

Similarly, the equation of (S/N)_out for QPSK nonlinearity (quadrupler) is given by

(S/N)_out = (1/16) (B_IF/B_L) (C/N) / [1 + 4.5(C/N)^-1 + 6(C/N)^-2 + 1.5(C/N)^-3] (6)

UQPSK modulation is different than QPSK in that the power in the I and Q channels is made unequal (usually in 1:5 ratio with Q channel takes lesser power than I channel) and, hence, the modulation is unbalanced to accommodate different data rates in I and Q channels. Now, if the total power in the spectrum is P and ρ is the fraction of P on I channel, then the output-signal-to-noise-ratio in the loop bandwidth of B_L of the UQPSK carrier referencing PLL can be derived as

(S/N)_out = {(1/4)(B_IF/B_L)(C/N)(2ρ-1)²}/[1+(1\2)(C/N)^-1+{ρ(1-ρ)(1-(R_Q/3R_I))}(C/N)] (7)

Where, R_I is the data rate on I-channel and R_Q is the data rate on Q-channel. Equation (7) is the same as that for BPSK with squaring except for two additional terms.

The numerator has (2ρ-1)² factor multiplying the input C/N ratio, which means that not all power is in I channel. The denominator has an extra term, [{ρ (1-ρ) (1-(R_Q/3R_I))} (C/N)], which is the result of S×S cross talk introduced by the UQPSK carrier regeneration process.

The desired 2W_C term to be tracked by the PLL is proportional to the total signal power entering the nonlinearity, and the S×S plus noise is also proportional to the signal power in the spectrum. With the increase in the input SNR to the PLL, the loop gain increases and, consequently, expands the noise bandwidth. Similarly, the self-noise spectral density due to the S×S product also increases. Thus, the output noise variance of the loop also increases.

However, incorporating a limiter in front of the PLL will, to some extent, provide a solution to the problem of varying input SNR and resultant jitter in the PLL at high input SNR. The inclusion of a limiter introduces a signal suppression factor into the analysis of the loop that improves the squaring loss performance of the loop at higher E_b/N_o ratios.

The limiter in front of the loop not only keeps the loop parameters constant, but also keeps the SNR of the signal entering into the loop constant under high E_b/N_o ratio conditions. The effect is the constant variance of output phase jitter.

But the case is different at very low SNR and the limiter degrades the SNR performance of the signal.

As already discussed, the jitter and static phase error in the recovered carrier depends on its SNR and results in the detection loss of the demodulator. A relation can be established between the detection loss, variance of the phase noise of the reconstructed coherent reference and the probability of bit error in the demodulated data, as under

L (dB) = (4.34/ρ_L) [(1+2γ) {1+ {(1+2γ) / (2ρ_L)}}] (8)

Where, ρ_L is the SNR in the loop, γ = Z₂ * E_b/N_o, and Z₂ is the effective loss in E_b/N_o caused by synchronization error.

Plots relating these parameters are available, serving as the guidelines to determine the required SNR of the referenced carrier to provide the BER close to theory for the chosen detection loss.

For UQPSK, the fraction of power ρ in I channel will become the guiding factor to determine the requirement of SNR of the referenced carrier, for a given detection loss. The fraction power r decides the cross-talk between I and Q channel in that as r gets closer to one, I channel derives more power from the total spectral power and the Q channel gets severely affected by the cross-talk from I channel.

Similarly, as ρ deviates more and more from unity, cross talk from Q channel starts affecting the I-channel. One can use above referred QPSK plots as the starting point and add in extra margin as a function of ρ and derive the required SNR of carrier reference for corresponding BER performance, for the given loss.

The coherent carrier recovery circuit's — being the most responsible constituent of the demodulator — design for multimission features has to be done by keeping various critical requirements in view. The effects of input data rate and SNR variations on the overall performance of the system have to be considered, and system elements have to be designed with broadband characteristics.

The following schemes are considered for realizing the coherent carrier recovery process in a multimission demodulator, as they are effectively configurable for varying requirements:

• Fourth-order Costas loop with a selection for second order;
• Multiplication loop with a selection between fourth power and squaring devices; and
• Long-loop PLL carrier recovery as an extension of the multiplication loop.

An explanation of this scheme is done with reference to the block diagram in figure 2.

The input modulated signal (received from the automatic gain controller (AGC) amplifier) is split into two paths and are mixed with the quadrature local oscillator signal (the VCO of the PLL) in the quadrature coherent detector to produce the desired I and Q baseband signals.

These signals are amplified in broadband DC coupled amplifiers and given to the bit-synchronizer for further processing. The samples of the same I and Q data streams are also amplified and filtered in the Costas-arm-filters. The arm-filter outputs are fed to the Costas phase detectors, which generate a phase error estimate through a hard limited polarity loop.

The loop has two operating modes, one as a carrier reference loop for BPSK (or UQPSK) and the other is for QPSK carrier regeneration. Effectively, when BPSK mode is selected, the loop realizes the second order nonlinearity. When QPSK mode is selected, it realizes the fourth order nonlinearity. The corresponding output phase error estimate is fed to a PLL integrator or loop-filter. The integrator output drives the VCO. The VCO output through the quadrature hybrid becomes the local oscillator (LO) inputs to the mixers of the coherent detector.

While the selection of the order of the nonlinearity facilitates the demodulator to function for the reception of data from BPSK/UQPSK/QPSK modulations, the performance of the demodulator for receiving signals with different data rates and E_b/N_o ratios mainly depends upon the bandwidth and characteristics of the Costas arm filters.

As has already been discussed, at higher input data rates and filter noise bandwidth approximating the symbol rate, the S×S data self noise increases and, though the SNR is controlled by the hard limiter, contributes to the increase in loop jitter.

This results in the requirement of higher SNR in the regenerated carrier for meeting the BER performance close to the theory. At lower symbol rates (B >> 1/T_s), the excess noise bandwidth of the arm filters contributes to increased squaring loss due to S×N and N×N products increasing.

To make the loop perform with reasonable phase jitter in the recovered carrier reference over the range of input symbol rates, the arm filters should be chosen with a noise bandwidth optimized for mid-range symbol rates such that the compromised performance is achieved between data self noise and squaring loss, and the performance degradation due to phase jitter may not be more than 2 dB at the extremes of the symbol rate range.

Multiplication loop with switching between the second order for UQPSK/BPSK carrier recovery and fourth order for QPSK carrier recovery is given in figure 3.

The analysis is identical to the analysis of Costas loop as explained above. The noise performance of both the loops is identical.

The one-sided lowpass arm filters are replaced by the double sided bandpass filter centered at the (× M) IF carrier frequency. The double sided noise bandwidth of this pre filter is chosen for a mid-range symbol rate. The noise bandwidth of the pre filter for second order loop is chosen for the I-channel data rate of UQPSK signal. Selection is done between second order and fourth order output into the phase lock loop carrier referencing. The VCO output is also simultaneously selected either for ×2 or ×4 multiplied output. The VCO output is power divided and one part is taken as the coherent carrier reference.

As discussed above, the wideband pre-filtering prior to the nonlinearity for modulation wipe-off has to be done to accommodate the highest data rate modulated signals for minimum squaring loss. The excess noise bandwidth in the filter, while receiving the lower data rate modulated signals, increases the squaring loss and, consequently, reduces the pre-PLL SNR.

Therefore, the acquisition threshold of the carrier referencing PLL vis-à-vis the input ratio increases, resulting in reduction in the link margin while receiving the lower data rate modulated signals. A relatively new and unique technique, which uses the multiplication loop, in long-loop configuration, to recover the coherent carrier, has been developed.

The method, while facilitating the use of wider pre-filter at the input carrier recovery nonlinearity, also optimizes the SNR at the input of the carrier referencing PLL by employing a narrow bandpass filter. This scheme has provided better lock threshold performance and loop stability in regenerating the coherent carrier for low SNR at different modulation schemes and input data rates, without degrading the BER performance of the demodulator.

The configuration of the long-loop scheme is explained with reference to figure 4.

The received modulated RF signal is mixed with the PLL VCO signal to provide an IF signal. The signal is passed through a three-way power divider. One output from the divider goes for the coherent detection, while the other two outputs are fed to the corresponding bandpass filters with the bandwidth selected optimally for minimum squaring loss for the highest baud rate, in each of QPSK/UQPSK (BPSK).

The filtered signal is then passed through the nonlinearity to remove the modulation. The fourth or second harmonic component of IF carrier frequency, after the nonlinearity, is filtered through the corresponding very narrow bandpass filter.

The output from the narrow bandpass filter is then phase locked with the ×4 or ×2 multiplied component of a very highly stable crystal oscillator source. The crystal oscillator source frequency is centered at the IF carrier frequency and becomes the coherent carrier reference for data detection after phase locking.

The PLL tracks the Doppler frequency variations of the input signal by correcting the VCO output frequency accordingly, while maintaining the IF output of the mixer at a constant frequency.

The VCO is swept for initial signal acquisition and is designed for acquiring the signal with a Doppler shift as high as ±500 kHz. As the Doppler effect is compensated prior to the carrier recovery non linearity, the bandwidth is controlled by using a narrow bandpass filter at the input of the carrier referencing PLL. This becomes possible in this configuration and the SNR at the output of the nonlinearity can be maximized to improve the overall lock acquisition threshold of the PLL.

Table 1 and table 2 compare the BER performances of the conventional and long-loop carrier recovery methods, practically measured with the identical input pre-filters to the nonlinearity, and at different data rates in different modulation modes, in a remote sensing satellite ground station.

The noise bandwidths of the input bandpass filter prior to the QPSK and BPSK nonlinearity are 116.14 MHz and 222.03 MHz, respectively. Similarly, the noise bandwidths of the pre-PLL narrowband filter and PLL are 5.04 MHz and 100 KHz, respectively.

The noise-bandwidth of the input filter prior to BPSK nonlinearity is chosen such that the SNR profile at the output of the squarer at a specific data rate remains almost same as that of the QPSK configuration at the same symbol rate and, therefore, maintains the same SNR at the input of the PLL.

As seen in the table 1, the entries pertaining to the BER with conventional carrier recovery for the data rate of 20.8 Mbps starts from the E_b/N_o of 10.8 dB against the entries of long-loop carrier recovery, which begins with the E_b/N_o of 7.8 dB itself. This is due to the poor acquisition threshold of approximately 10.5 dB of the conventional loop as against the 7.5 dB of the long-loop PLL, which starts recovering carrier from the lower E_b/N_o while allowing the noise bandwidth of the pre-filter to the nonlinearity to be wide enough (116.14 MHz) to accommodate the data rate of 105 Mbps. The case with other entries in table 1 and table 2 at other data rates and modulation schemes is similar.

Various design options are considered to realize the carrier recovery process in a multimission demodulator. The Costas loop and the multiplication loop configurations, among these, are the conventional techniques.

The analysis and the results of practically designed unit using these conventional design procedures show that the unit performs reasonably well for the limited range of input data rate (such as 40 Mbps to 110 Mbps) and E_b/N_o variations. For the wider input parameter variations, these techniques require a higher acquisition threshold, and result in signal loss at lower antenna elevation angles below 5 degrees.

Very large Doppler offset and rate in the received signal from remote sensing satellites impose more restrictions on the PLL design. The long-loop technique has given solutions to these design restrictions while providing overall improvement in the carrier recovery loop. The demodulator with this technique acquires lock, and starts regenerating the coherent carrier at very low input SNR, a feature very useful in remote sensing satellite ground station applications where the coherent continuous clock is required to be supplied to the recording system even from the antenna angles lower than one degree in elevation.

The BER performances of all the carrier recovery methods, however, are found to be almost identical.

Floyd M. Gardner, Phase Lock Techniques 2nd Ed., (John Wiley & Sons: New York) 1979.

Tri T. Ha, Digital Satellite Communication, (McGraw Hill International Editions: New York) 1990.

P.K. Jain, Surendra Pal and V.M. Pandharipande, “Real-time Quality Analysis of Digital Remote Sensing Satellite Signals,” RF Design, March 2003, pp. 14-20.

P.M. Rao, P.K. Jain and Padmavathi C.S, “Coherent carrier regeneration using a long loop PLL technique,” Applied Microwave & Wireless, May 1998, pp. 28-42.

P.M. Rao, G. Umadevi and P.K. Jain, “Design of Multifunction Digital Data Demodulator and Bit Synchronizer for Remote Sensing Satellite Data Reception,” IETE Technical Review, July through October 1996, pp. 233-240.

J.S. Gray, “LANDSAT D wideband unbalanced QPSK demodulator/bit synchronizer-signal conditioners,” Satellite Communications Symposium, 1981.

R.M. Gagliardi, Satellite Communications, (CBS Publishers & Distributors, Delhi) 1987.

P.K. Jain has worked as a scientist/engineer at the National Remote Sensing Agency, Hyderabad, Department of Space, in India, for the last 14 years. He recently joined the Space Application Centre, Ahmedabad. His history includes the design and development of remote sensing satellite ground station systems such as PSK modulators and demodulators, PLL beacon tracking receivers, and up/down converters. He has a B.E. degree and an M. Tech degree, and is registered for his Ph.D. Jain can be reached at pkjainshubhra@yahoo.com.

Dr. Surendra Pal is the deputy director in the Indian Space Research Organization Satellite Centre, Bangalore. He joined ISRO in 1971, after a brief tenure at TIFR. He is also the chairman of information infrastructure working group of ministry of information technology. Pal is a distinguished fellow of the IETE, a fellow of the INAE. He can be reached at pal_surendra@hotmail.com.

V.M. Pandharipande has a B.E. from Nagpur University and an M. Tech and Ph.D. from I.I.T. Kharagpur in India. He has taught and researched microwave circuits, phased array antennas and electronically scanned radar. Pandharipande joined Osmania University, Hyderabad in 1983. He can be reached at vijaympande@yahoo.com.