RF Design Magazine


Barcelona Design to Offer Analog IP for 90 nm Node
Nov 1, 2002 12:00 PM 

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Barcelona Design Inc. announced its plan to develop products at the 90 nm technology node. Taiwan Semiconductor Manufacturing Co. is expected to share technology information with Barcelona to support the development of analog intellectual property (IP) engines based on TSMC's Nexsys 90 nm process technology.

Barcelona said that it would provide synthesizable analog or mixed signal components for analog functions such as phase-locked loops and data converters designed to meet the requirements of SoCs targeted at the computing, communication and consumer segments.

Barcelona intends to launch its first product in the first half of 2003.

TSMC works extensively with industry-leading third-party IP providers to create the foundry industry's most comprehensive process-specific IP portfolio at technology nodes ranging from 0.25 micron to 90 nanometers.

These process-proven cores provide designers with increased assurance of “right-the-first-time” silicon while reducing overall engineering and out-of-pocket expenses.

Without this service, many design engineers would have to develop their own IP or purchase custom cores, all of which considerably delays time-to-volume.



February/March 2012
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