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The growing market of portable wireless communication systems, such as wireless (cordless and cellular) phones, wireless local area network (WLAN) and the global positioning system (GPS) has increased the need for low-cost and high-performance receivers. The zero intermediate frequency (ZIF) receiver is often used to avoid the image-frequency, but this architecture suffers from the flicker noise (also called 1/f noise). Because of the problems mentioned above, another architecture that trades off between the ZIF and flicker noise has been developed. It lowers the intermediate frequency (IF) to very low IF or VLIF. Consequently, such low-frequency signals can be easily processed by today's digital signal processors (DSPs). Thus, VLIF receivers are getting more and more popular in wireless applications^[1].

Since the RF mixer is a building block of the wireless system, it demands stringent dynamic range, which determines the performance of the receiver^[2]. The dynamic range is determined by the noise floor and the linearity. For the VLIF applications, the flicker noise limits the noise floor of the mixer. To meet the above requirements, a micromixer was proposed by Gilbert, which achieves the high linearity and is widely used in wireless communication systems^[3]. However, the second-order intermodulation products generated in double balanced configuration are more difficult to remove by the IF filter than the third-order products generated in VLIF design^[4]. To address these problems, a novel downconversion mixer configuration is presented.

At the core of all mixers presently in use is a multiplication of two signals in the time domain^[5]. Among the multiplier-based mixers, the Gilbert cell is the most widely used for its distinguished behavior in frequency translation.

Generally, there are two types of Gilbert cell mixers, the bipolar and the CMOS. As is well known, one of the non-linearity contributions for a bipolar Gilbert cell mixer arises from the non-linearity of the switching stage. At the same time, the driver stage of CMOS Gilbert cell mixer has a poor performance at RF, which introduces a higher noise figure^[4]. To overcome the disadvantages of these two types of Gilbert cells, the configuration proposed here exploits the benefits of bipolar driver stage and MOS switching stage.

As aforementioned, the Gilbert-cell mixer can be functionally divided into two stages: the driving stage and the switching stage. The former is used to convert the RF voltage signal into the current one. In this stage, the lower input impedance (typically 50 Ω), higher f_t and larger g_m of bipolar transistors enable them to achieve low noise and excellent performance at high frequency as compared to MOSFETs^[6].

Although the bipolar transistor has its advantages in driver stage at high frequency, its poor linearity generates more undesired frequency components, which will reduce the linearity of the mixer, thus limiting the dynamic range of the receiver. For the switching stage, MOSFET can provide linear behavior as well as save the die size with a reasonable noise figure. As a device of majority carrier, the MOSFET can minimize the interval of time in which both transistors conduct current and hence, generate noise by adjusting the overdrive voltage^[7]. Simultaneously, the conducted local oscillator (LO) radiation can also be reduced.

Thus, an optimum Gilbert-cell mixer can be built by combining the bipolar driver stage with MOSFET switching stage. And, the widely used BiCMOS process makes this configuration possible. The simplified schematic is shown in Figure 1.

The improved Gilbert cell mixer with BiFET configuration shown in Figure 2 is presented here. One advantage of the VLIF receiver is the immunity to RF or LO feedthrough because the frequency of the IF is now much lower than RF or LO and can be filtered easily.

To save the die area, a passive RC filter formed by R1, C1, R2 and C2, shown in Figure 2, is adopted to eliminate a balun in the input stage while removing the RF signal to bias of the driver stage. The LO-RF isolation is explicitly enhanced by using this RC filter in the input stage. Therefore, the LO-induced radiation can be attenuated. The input devices Q1 and Q2 are biased at their optimum bias current density to operate at the optimum noise figure point while their size is varied to match the optimum noise impedance with the driving source impedance. The wire connecting the emitters of the Q1 and Q2 helps achieve the linearity requirements by minimizing the mismatch of the resistive emitter degeneration.

The overdrive is an important quantity in CMOS switching stage design, affecting not only the input range of the differential pairs, but also other characteristics including the speed, offset and output swing^[7]. Since the overdrive of a CMOS transistor depends on its current and W/L ratio, the range of a source-coupled pair can be adjusted to suit a given application by adjusting the value of the tail current and/or the aspect ratio of the input devices. Contrarily, the input range of bipolar switching stage is about ±3V_T, which is independent of its bias current or device size. Reducing the input range of the switching pair can minimize the amplitude of the LO to attenuate the radiation induced by the LO leakage. Improving the speed and offset characteristics of the switching stage can suppress the distortion and the RF-IF feedthrough of the mixer, which enlarges the dynamic range of the whole receiver.

The capacitances C3 and C4 together with the resistive load R_L are used as an RC filter to remove those undesired frequency components at the IF port. The linearity and conversion gain of the Gilbert cell can be improved by increasing the bias current while the noise figure and power consumption increase as well. The M5 and M6 provide an easier method to trade off among the merits mentioned above. The MOSFET is a voltage-controlled current source. Therefore, the voltage of control shown in Figure 2 can be used to adjust the current bias of both the switching stage and RF stage.

The RF stage of the mixer is a linear transconductance stage, so the design technique for a low-noise amplifier such as noise optimization technique^[8] and impedance-matching technique can also be applied here to improve the performance of the RF stage of the mixer.

First, the bipolar transistors of the input stage should be biased at an optimum point that is given by^[10]: (Eq. 1)

Where J_Copt is the current density of the collector of the transistor.

Under such conditions, the noise figure of the input stage follows^[11]: (Eq. 2)

When the mixer achieves the NF_min, the input impedance of the mixer must be satisfied: (Eq. 3)

where N means the emitter stripe ratio and M represents the number used in parallel.

And then under the conditions of Equation 2 and Equation 3, the Equation 1 can be rewritten as follows: (Eq. 4)

By adjusting the size and number in parallel of Q1 and Q2, the simultaneous noise and input match can be achieved.

The transfer function of an ideal differential pair is given by^[5]: (Eq. 5)

where e and E present the input signal and input offset E, respectively. Assuming E to be small, Equation 5 can be expended into: (Eq. 6)

The second intercept point occurs when the first-order term equates the second-order one: (Eq. 7)

Applying Equation 5-Equation 7 to the configuration shown in Figure 2, the emitter current of Q1 and Q2 in the RF stage shown in Figure 3 is given by (Eq. 8 & Eq. 9):

Assuming the MOSFET to be perfect switch, the mixer presented has the transfer function: (Eq. 10)

where V_T is the thermal voltage, v is the input RF signal and the S() is the switch function. Expanding Equation 10 gives: (Eq 11)

Introducing the coefficients from Equation 11 into Equation 7, the input intercept point will occur when: (Eq. 12)

Converting from a second-order voltage intercept point to a second-order power intercept point (IIP2) referenced to the load R_L in dBm gives: (Eq. 13)

The results of Equation 13 when introduced the specified values of V_T, E and R_L is close to the simulation result that will be mentioned in the next section.

The analysis thus far shows us the IIP2 of this improved mixer. Comparing to the IIP2 of the double-balanced mixer, Equation 13 is more advanced in IIP2 of the mixer presented in this paper. Therefore, the IIP2 of the improved Gilbert cell is irrelevant to the tail current (2I) shown in Figure 3, which means the embarrassment between the power consumption and IIP2 can be avoided. Similarly, Equation 14 is also irrelevant to the impedance of the tail current source (R) shown in Figure 3, which indicates that the optimization of input impedance will not affect the IIP2. Furthermore, the offset E in the input signal can be attenuated by the RC low-pass filter at the base of the Q2. As the thermal voltage V_T is constant at a certain temperature, the IIP2 of the downconversion mixer can be improved by optimizing the impedance of the load (R_L).

Based on 0.8 µm, 5V BiCMOS process, the BiFET downconversion mixer was designed and simulated through Cadence SpectreRF and Advanced Design System unless otherwise mentioned. In Figure 4, the simulation shows the noise figure of this configuration. The corner frequency has been reduced below 70 kHz, and the SSB NF simulated at 270 kHz is 9.54 dB. With the improvement of the flicker noise, Figure 3 shows that this configuration is suitable for wireless applications on VLIF architecture, which often suffers from the 1/f noise. Although the parasitic components are unavoidable in practice, the measurement result will not be much different from the simulations since the simulations were done with the accurate model, and the post simulations were also carried out.

In VLIF architectures, the even-order distortion terms are also of particular concern. The IIP2 of 30.8 dBm is achieved as shown in Figure 5.

In Table 1, important parameters are listed.

The performance of this BiFET downconversion mixer is given through the above demonstrations.

Due to the presence of both baseband and RF circuits in the integrated receiver, the effect of digital noise has been minimized by the arrays of guard rings with substrate contacts. The power supplies for baseband and analog circuits have been separated for noise considerations. As shown in Figure 6, the symmetry of the BiFET mixer is critical for the mismatch of I/Q imbalance. The first level metal ring under the pads provides a robust on-chip ground with substrate contacts.

The improved downconversion mixer topology for VLIF receiver was designed. This new configuration that merges the advantages of bipolar in RF and CMOS used as switch provide better linearity than the traditional ones illustrated in this article. By simulation, the downconversion mixer achieves conversion gain of 18.23 dB, IIP2 of 30.8 dBm and NF of 9.54 dB when input frequency is 868 MHz and IF is 270 kHz. Furthermore, the low corner frequency of flicker noise is suitable for those VLIF and direct-conversion architectures.

The author would like to thank the RFIC Design Group at IMCS for their support and ideas. This research is mainly supported by the project of Shanghai Science & Technology Commission (No. 037062010 & AM0308).

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3. B. Gilbert, “The MICROMIXER: A Highly Linear Variant of the Gilbert Mixer Using a Bisymmetric Class-AB Input Stage,” IEEE J. Solid-State Circuits, Vol. 32, pp. 1412-1413, September 1997.

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5. T.H.Lee, “The Design of CMOS Radio-Frequency Integrated Circuits,” Cambridge University Press, 1998.

6. Livingston, H.; “A Survey of Heterojunction Bipolar Transistor (HBT) Device Reliability,” Components and Packaging Technologies, IEEE Transactions. Also see “Components, Packaging and Manufacturing Technology, Part A: Packaging Technologies, IEEE Transactions, Vol. 27, Issue 1, March 2004, pages 225-228.

7. R.D. Middlebrook, “Differential Amplifiers,” Wiley, New York, 1970.

8. Jung-Suk Goo; Hee-Tae Ahn; Ladwig, D.J.; Zhiping Yu; Lee, T.H.; Dutton, R.W.; “A Noise Optimization Technique for Integrated Low-Noise Amplifier,” Solid-State Circuits, IEEE Journal, Vol. 37, Issue 8, August 2002, pages 994-1002.

9. R.Meyer, “Intermodulation In High-Frequency Bipolar Transistor Integrated-Circuit Mixer,” IEEE J. Solid-State Circuits, Vol. sc-21, August 1986.

10. Shana'a, O.; Linscott, I.; Tyler, L.; “Frequency-Scalable SiGe Bipolar RF Front-End Design,” Solid-State Circuits, IEEE Journal, Vol. 36, Issue 6, June 2001, pages 888-895.

11. Girlando, G.; Palmisano, G.; “Noise Figure and Impedance Matching in RF Cascode Amplifiers,” Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions, also “Circuits and Systems II: Express Briefs,” IEEE Transactions, Vol. 46, Issue 11 , November 1999, pages 1388-1396.

12. M.R. Spiegel, “Mathematical Handbook of Formulas and Tables,” New York, McGraw-Hill, 1968.

Wei Jin, Yongsheng Xu and Zongsheng Lai are researchers at the Institute of Microelectronics Circuits & System, East China Normal University, Shanghai 200062, P. R. China. Wei Jin can be contacted at jimway2002@yahoo.com.