RF Design Magazine


High-resolution ADC raises the bar for speed and dynamic range
Sep 1, 2005 12:00 PM 

To address the needs of demanding wideband, low-noise signal acquisition applications in cellular base stations, high sensitivity receivers and data acquisition systems, Linear Technology has developed a 130 Msps 16-bit analog-to-digital converter (ADC) with exceptional spurious free dynamic range (SFDR). The LTC2208's exceptional SFDR performance of 100 dBc, combined with a 78 dB signal-to-noise ratio (SNR), enable it to resolve low-level signals in the presence of large interferers and blockers. The device also features an internal transparent dither circuit that improves the ADC's SFDR response well beyond 100 dBc for low-level input signals. The 16-bit ADC's power consumption is only 1250 mW. According to LTC, it is the fastest 16-bit, high-performance ADC on the market.

The LTC2208 incorporates two unique features that simplify receiver design and improve system performance (see figure). The first is an internal transparent dither circuit that improves the ADC's spurious-free dynamic range (SFDR) response well beyond 100 dBc for low-level input signals. The second feature is a digital output randomizer that dramatically reduces unwanted tones caused by digital feedback. The flexible digital outputs can be run as single-ended CMOS or low-voltage differential signaling (LVDS). It also features a programmable gain amplifier (PGA) front-end that eases the ADC driver output power requirements when driving the lower input range of 1.5 Vp-p. This improves the distortion performance and power consumption of the driver with minimal impact on ADC noise performance.

The LTC2208 packages an extensive feature set in a 9 mm × 9 mm QFN package delivering low power consumption at 1250 mW without the need for heat sinking. Most important, both the power consumption and total solution size with integrated bypass capacitance are less than half that of the nearest competitor, claims LTC. Designed for ease of use, it requires only a single 3.3 V supply for operation and comes with a clock duty cycle stabilizer for maintaining the ADC performance over varying duty cycles. The LTC2208 can accept high frequency, wide dynamic range signals, offering a wide analog input bandwidth of 700 MHz

The LTC2208 family includes speed grades of 130 Msps, 105 Msps, 80 Msps, 65 Msps, 40 Msps, 25 Msps and 10 Msps all with high SFDR and SNR performance. In addition to the 16-bit parts, the supplier also plans to offer 14-bit versions. For quick device evaluation, demo boards are available.

For more information, visit www.linear.com



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