Combining 0.35-micron CMOS process with refinements in pipelined architecture, Linear Technology's newest high-speed analog-to-digital converters (ADCs) raise the performance bar in power consumption and AC performance. These products enable the manufacturer to cut power consumption and shrink die size without compromising ac performance. The new LTC2220 family includes 24 ADCs, ranging from 10 Msps to 170 Msps at 12-bit and 10-bit resolution, as well as 14-bit converters up to 80 Msps. Complementing the previously announced LTC1750 family of 5 V ADCs, the 3.3 V LTC2220 family of converters feature significantly lower power than competing devices without sacrificing ac performance. These low power ADs excel at undersampling, making them well suited for communications applications such as WCDMA cellular base station transceivers, digital predistortion power amplifier linearization, and cable modem termination systems.

The 12-bit 135 Msps LTC2224 exemplifies the performance of the entire family. At 630 mW power dissipation, in a 7 mm × 7 mm QFN package, it has the lowest power at this speed and is almost half the size of its nearest competitor, according to LTC. In addition, it achieves more than 67 dB signal-to-noise ratio (SNR) up to 170 MHz input. Furthermore, the system footprint is small because few external bypasses are needed. Ideal for low-power base-station designs and optimized for undersampling, the LTC2224 features a 775 MHz full-power bandwidth and achieves 77 dB spurious-free dynamic range (SFDR) up to 250 MHz input. Pin-compatible versions at sample rates of 105 Msps and 80 Msps feature even lower power. Pin-compatible 10-bit versions at each speed are in full production.

Slated for introduction this quarter, the entire LTC2220 ADC family includes 24 devices. In addition to LTC2224, the supplier is also releasing additional high-performance, low-power ADCs — LTC2222, LTC2223, LTC2234, LTC2232 and LTC2233. All are now in production and are packaged in 7 mm × 7 mm QFN packages.

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