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By definition, an application-programming interface (API) is the interface between the application software and the application platform, across which all services are provided^[1]. Primarily, APIs are defined to support application portability. Additionally, the Systems Interface Working Group of the Software-Defined Radio (SDR) Forum feels it is necessary to educate the general community on the importance and development of APIs for SDR^[2]. For those working with the Department of Defense (DoD), API's are non-negotiable. Developers are required to submit APIs for approval and configuration management by the JTRS JPO^[3]. So given the need for SDR API, where's the beef?

The perceived need for APIs, its significance to the success of SDR and the requirement for published, non-proprietary interfaces can be traced back to meeting number two of the SDR Forum^[4]. This recognition resulted in the development of the MMITS API definition (MAD) process^[5]. The latest work is now occurring in the Object Management Group (OMG) with the SDR Forum being one of the technical contributors. We'll examine an API that was developed before the SCA and the SDR Forum technical report v 2.1, and understand its applicability toward a lower-level ubiquitous API that has so far eluded us.

The Global Mobile Information System was a DARPA program circa late 1990 that focused on developing new wireless ad hoc networking technologies. Part of the effort resulted in a smart antenna API and a radio device API^[6]. Additional API specifications existed for a framework superclass and an extension for TDMA transceivers. The reason we are looking back at the GLOMO API is that it pre-dates the SCA wherein radio devices and services were completely abstracted away. We examine the features of the GLOMO API and then compare it against the feature set of the latest platform-independent API's from the OMG and SDR Forum. Finally, this article suggests a further stratification of the GLOMO API's and then applies them to M/A-COM's digital transmitter technology.

Toward that end, consider the interface requirements for four major mobile system standards; namely GSM/GPRS/EDGE, CDMA2000, W-CDMA and TD-SCDMA. They can also be described as 2.5G to 3.5G standards, which are on the market today or expected to be introduced to the mobile phone market in the near future. The proposed wireless radio front-ends for each standard are essentially based on M/A-COM's digital polar transmitter (DTx) architecture, which will be discussed in some more detail later on.

As shown in Figure 1, the digital RF front-end (DRFE) module represents the back end of the digital polar transmitter. The DRFE module is designed specifically to generate precise RF signals over a very wide dynamic range in all four bands for GSM/GPRS/EDGE and CDMA2000 applications, and in the appropriate frequency bands for WCDMA and TD-SCDMA systems. The main blocks, which make up the digital polar transmitter are the baseband IC, which is the baseband and mixed-signal block, and the two RFIC blocks, represented by the transceiver (phase modulator) and the DRFE module.

The partitioning of each system is chosen such that three functional blocks are sufficient for the generalized interface description. This requires the use of analog and digital signal interfaces; we will consider the three main physical interfaces: the baseband interface from the baseband and mixed-signal block to the DRFE module, the baseband interface between the baseband and mixed-signal block and the transceiver, as well as the RF interface between the transceiver and the DRFE module. For multimode applications, it is assumed that all system blocks are capable of generating and processing the necessary signals for GSM/GPRS/EDGE, CDMA, WCDMA and TD-SCDMA mobile systems.

In fact, these three main blocks — baseband and mixed-signal, transceiver and DRFE module — are assumed to be capable of processing signals for the four international standards GSM/GPRS/EDGE, CDMA2000, WCDMA and TD-SCDMA. The baseband and mixed-signal block provides the required interface to the transceiver and the DRFE module and generates all the interface signals, analog and digital, and symbols required for the operation of the DRFE module and the transceiver (phase modulator). It is also capable of providing some of the signal-conditioning functions such as conversion of symbols or digital I and Q signals to amplitude and phase. On the transmit path through the transceiver and the DRFE module, the block generates GSM/GPRS/EDGE (or other international standards) baseband analog and/or digital I and Q, symbols and clock signals for the digital polar transmitter. On the receive path, the same block accepts and processes the analog baseband I and Q signals from the transceiver.

The transceiver used in the GSM/GPRS/EDGE system of Figure 1 is assumed to have a polar-based phase modulator. It is a full quad band (EGSM 900, GSM 850, DCS 1800 & PCS 1900) GSM/GPRS/EDGE multislot transceiver for wireless handset applications. The transmit path may be an offset loop architecture, which serves as the phase modulator block of the GSM/EDGE system. A transceiver may require an external crystal as reference.

On the transmit path the transceiver takes the I and Q filtered DAC outputs of the baseband and mixed-signal block or the DRFE module to drive the internal phase modulator. The modulator output signal is applied to a synthesized phase locked loop, so that the modulation signal is copied onto the TX VCO. The RF phase output signal from the phase modulator has a dual output, one for low band and the other for high band, to meet the quad band operation requirement of the DRFE module. On the receive path, the transceiver takes the filtered receive RF signals from the antenna switch through an intermediate frequency converter. The IF signal is in turn demodulated to generate the I and Q input signals for the baseband and mixed-signal block. The same block is expected to be capable of processing signals for other international standards, such as CDMA2000, WCDMA and TD-SCDMA.

The DRFE module interfaces in the system to both the baseband and mixed-signal block and the transceiver. It is made up of the following main components: The Si IC including amplitude processing, the power control circuit, the power amplifier (PA) (dual band three-stage GaAs PA) and the antenna switch block (including coupler, harmonic low-pass filter and power detector). The RF phase signal for the DRFE module is supplied by the transceiver. The baseband amplitude and phase components of the transmit signal can be generated either in the baseband and mixed-signal block or in the silicon IC of the DRFE module. The DRFE module receives digital symbols or digital amplitude datastream from the baseband and mixed-signal block. The IC performs signal processing, conditioning and power control (open and closed loop), and drives the PA and the antenna switch of the DRFE module. Additional functions such as clock generation, DigRF data interface, serial amplitude interface, serial I & Q interface, analog amplitude interface, DigRF serial interface and symbol to amplitude converter are integrated on the silicon chip. The DigRF interfaces are optional, and are only required to meet the DigRF standard^[8]. The power control signal, possibly derived from some sort of a power detector, may be applied to the PA through some amplitude processing circuit to control the required output power level of the DRFE module. The TX_PWR_CTRL signal is generated at base-band by the baseband and mixed-signal block.

Similar to the system block “baseband and mixed signal block” and the transceiver, The DRFE module is expected to be capable of processing signals for other international standards, such as CDMA2000, WCDMA and TD-SCDMA.

The interfaces of interest are made up of digital and analog interfaces, including proposed interfaces based on the DigRF standard^[7,8]. Even though DigRF is not yet an adopted standard, it is important that the proposed generic interfaces in Figure 1 are compatible with the DigRF standard for future multimode mobile system applications. Traditionally, analog I and Q signals are commonly used for interfaces at baseband. However, in recent years, digital I and Q are becoming popular for mobile system applications, and has become a strong driving force behind the DigRF standard. This new approach of using digital signals at baseband falls in line with implementation of SDR architectures.

The required interfaces for the GSM/GPRS/EDGE mobile system are listed in Table 1. The majority of these interfaces are common to the four modes of application: GSM/GPRS/EDGE, CDMA2000, WCDMA and TD-SCMA. The physical interfaces are described in the following paragraphs.

VREF and VBAT are the reference and the battery voltages respectively, and the dc power supplies of any mobile handset are derived from these voltages. The RF signals are transmitted and received through the antenna, which gives access to transmit and receive paths of the digital transmitter. TX_ENABLE enables and disables the transmit path. RFIN is the RF phase output signal from the transceiver to the input of the DRFE module, and it is either for low band or for high band in the case of multiband applications. The SYS_CLK is the clock of the data interface and is also used as the digital system clock source. For GSM/GPRS/EDGE mode for example the system clock is 13 MHz and 26 MHz. Ideally, all system clocks required for the full function of the DRFE module are derived from the system clock, except the DigRF control clock. The signal SYS_CLK_EN is required to control the crystal for the transceiver. The SYS_RESET is a bidirectional interface for system reset, and provides information associated with system reset between the baseband and mixed-signal block and the DRFE. The quad-band system shown in Figure 1 requires four receive paths represented by RX1, RX2, RX3 and RX4. All RF signals through these four interfaces are filtered by receive SAW filters for the appropriate frequency bands before they are applied to the input of the transceiver.

DIGRF_CTRL_CLK, DIGRF_CTRL_EN and DIGRF_CTRL_DATA are DigRF standard control interfaces, and belong to a bidirectional three-wire interface between the baseband and mixed-signal block and the DRFE module^[8]. This type of interface can be shared with the transceiver block by re-using the DIGRF_CTRL_DATA and DIGRF_CTRL_CLK signals and generating a separate DIGRF_CTRL_EN for the transceiver.

TX_PWR_CTRL is a ramp voltage for power control provided by the baseband and mixed signal block to the DRFE module; it is a time waveform, e.g., raised cosine, Gaussian, etc. The waveform is optimized to ensure that the RF output power of the DRFE module at the antenna complies with the minimum requirements of the international standard GSM/GPRS/EDGE. Unlike the GMSK modulation with constant envelope, EDGE or 8-PSK modulation has amplitude modulation. In this case, a special control mechanism may be required to achieve the spectrum mask requirements for EDGE.

The serial digital amplitude interface comprises RX_TX_DATA and RX_TX_DATA, and it is synchronized with the system clock SYS_CLK; this interface carries transmit symbol information to the DRFE module and to the transceiver. SHDN_TX is a digital signal required to shut down the transmit path in the transceiver during periods of inactivity, and also to save dc power of the mobile handset. SHDN_RX is a digital signal to shut down the receive path in the transceiver.

I_INTX and Q_INTX are baseband analog phase signals from the baseband and mixed signal block or from the DRFE module to transceiver. They carry the transmit information for upconversion to RF in the transceiver. I_OUTRX and Q_OUTRX are analog baseband signals from the transceiver to the baseband and mixed signal block; they are generated through down-conversion and demodulation of the receive RF signals. The set of interfaces I_INTX & Q_INTX and I_OUTRX & Q_OUTRX may be multiplexed onto the same interface, since there is no need to transmit and receive simultaneously in a GSM/GPRS/EDGE mobile system; this condition does not apply to CDMA systems, which are all full duplex.

ANALOG_AMPLITUDE is an analog amplitude signal component of the transmit signal from the baseband and mixed signal block to the DRFE module for signal processing and conditioning. This interface is used when the amplitude component of the transmit signal is provided by the baseband and mixed signal block. RX_GAIN_CONTROL provides digital signal to control the gain on the receive path of the transceiver.

The CDMA2000, W-CDMA and TD-SCDMA systems are based on code-division multiple access (CDMA) technology and have similar architectures for the mobile system applications. It is, therefore, appropriate to describe the three systems together using a simplified CDMA multimode block diagram presented in Figure 2. As in the case of the GSM/GPRS/EDGE system architecture description, the same three interfaces will be considered in this summary, to be consistent with the proposed generic multimode system.

The system block diagram in Figure 2 uses the same functional blocks as the GSM/GPRS/EDGE system of Figure 1 and do not require further detailed descriptions.

The main interface signals are summarized in Table 2. The functional description of 24 interfaces, which are common between this multimode system and the previous GSM/GPRS/EDGE system are not included in this section. The CDMA2000, WCDMA and TD-SCDMA mobile system requires four additional interface signals, while the GSM/GPRS/EDGE system needs only two other interfaces for complete functionality of the mobile system.

BAND_SEL is control signal for choosing the low band or high band input of the DRFE module based on the RF phase frequency of operation. SYNTH_LOCK signal carries the synthesizer status information to the baseband and mixed-signal block from the transceiver. AFC provides automatic frequency control for the crystal of the transceiver. TX_GAIN_CONTROL is required for setting transmit output power of the mobile system at the antenna. All other interfaces provide CDMA2000, W-CDMA and TD-SCDMA- related functions for the system.

The general trend of technology in handset development is higher and higher integration of the required circuit blocks, and the use of the same mobile station for many wireless system modes, without ever changing the MS equipment. In the following summary, a generic multimode interface structure is being proposed for the realization of a multimode handset for CDMA2000, GSM/GPRS/EDGE, TD-SCDMA and W-CDMA.

The proposed multimode block diagram in Figure 3 is essentially a combination of the GSM/GPRS/EDGE system in Figure 1 and the CDMA multimode system in Figure 2. One of the key goals or requirements of the generic multimode system being proposed is to minimize the number of physical interfaces required to satisfy the operation of all modes, using multiplexing of signals wherever possible; this is not an easy task and may require a lot of software development, memory and increased DSP processing power.

The polar modulation technology creates a common platform for processing signals based on multiple international standards, by splitting each transmit signal into two components, amplitude and phase; most of the signal processing of amplitude and phase is done individually at baseband, which generally is easier and cheaper than when this is done at the RF stage. The recombination of the amplitude and phase components is accomplished at the final stage of the PA.

Some of the advantages of a common multimode interface include SDR capability, higher circuit and system integration, further reduction in size compared to mobile phone capabilities, efficient use of subcircuits and systems, and efficient and ubiquitous use for mobile phones. However, there are many challenges to accomplishing a common multimode interface. It requires advanced software design, more sophisticated circuit and system design, and could encounter the risk of not meeting all international standards specifications with large margins. Plus, it requires new technologies for successful implementation of circuits and subsystems.

Overall, the GSM/GPRS/EDGE architecture requires 26 interfaces, while the CDMA2000 has 29 interfaces, the W-CDMA and the TD-SCDMA systems require 26 each. The interface signals for the generic mobile system have been described in detail in the previous sections and are listed in Table 3. The GSM/GPRS/EDGE system uses TX_PWR_CTRL for power control, but does not need BAND_SEL, SYNTH_LOCK, AFC and TX_GAIN_CONTROL; the reverse applies to the CDMA multimode system.

The digital interface signal MODE_SEL selects the various modes of operation for the DRFE module. The silicon IC of the DRFE module can also be programmed to recognize the modes of symbols or I and Q signals from the baseband and mixed-signal block to the DRFE module, and determine their corresponding signal processing paths. The MODE_SEL interface is, therefore, an optional interface requirement for the generic multimode mobile system.

Table 4 shows a quick overview of the key interfaces required by each mode of the generic multimode proposed in this article. It is understood that every multimode design in practice may be optimized based on the system block available for the system design. In our case, 30 interface signals seemed to be a reasonable number of signals to adequately describe the performance of proposed generic multimode mobile system.

A new digital polar design that facilitates SDR transmitters has been developed by M/A-COM, Tyco Electronics. M/A-COM's new transmitter technology features a complete, digital baseband to RF/PA transmit chain that comprises a novel digital power amplifier (DPA) and transmit IC. The wideband DPA uniquely provides RF power amplification, phase/amplitude combining and amplitude modulation in a single device. This device is complemented with a digital modulator to realize a compelling digital transmitter (DTx) architecture. The fully digital nature of the DTx allows it to efficiently adapt, through programmability, to various modulation standards, e.g., GSM/EDGE, CDFMA2000, over a wide range of frequencies with minimum complexity. The unprecedented multimode/multiband nature of the DTx qualifies it as a strong candidate for future software-defined radios, particularly for handsets. More technical details and discussion with regard to the DTx architecture can be found in^[9-11].

Figure 4 depicts a high level abstraction of the digital transmitter architecture, which consists of two modules, namely, the digital modulator (DM) module and the DPA module.

The DM module converts the native digital baseband I/Q signals from the Cartesian domain to the polar domain. This digital interface eliminates the need for baseband digital-to-analog converters (DACs) and reconstruction filters. This block also performs the signal processing to meet spectral mask requirements and compensate for AM/AM and AM/PM distortions. The phase information is passed through a phase modulator, yielding an on-channel, phase-modulated carrier. The phase-modulated carrier is fed into the DPA, along with the amplitude modulation information. The two signals are combined to generate a fully modulated carrier, with the required output power signal level. The combining of the magnitude and phase signals takes place at the final output stage of the DPA, allowing the earlier stages of the DPA to operate in compression. This digital transmitter approach can also be reconfigured for multiband/multimode operation: The DTx is tunable through an off-channel synthesizer to support different bands. There is no band-specific hardware, and therefore the DTx can be configured for different frequency bands and modulation schemes by simply reconfiguring clock frequencies and filtering coefficients to support the desired standards. Finally, power control; an important issue in the design of CDMA transmitters, is accomplished with multiple VGA stages operating in the transmit chain. Because the DTx is a direct conversion, polar-based approach, it follows that all the gain control must take place at RF frequencies.

When used in conjunction with the digital transmitter, the DPA offers several advantages:

• The DPA is capable of wideband amplitude modulation. Amplitude bandwidths associated with all the major modulation schemes are readily accommodated (envelope bandwidths of 10 MHz and beyond).

• Performing amplitude modulation at the last stage of the DPA gives reduced current drain over the transmit power control range. The final stage of the DPA is biased into Class B or Class C operation. Additionally, the driver stages are operated non-linearly for efficiency, consuming very low quiescent current (<30 mA).

• The DPA facilitates efficient power control at all levels of RF power. A dynamic range of 55 dB is realized under CDMA modulation. This is possible because the gain is applied to a constant-envelope waveform that contains only phase information. The phase is insensitive to distortion and, consequently, the DPA stages are biased to operate non-linearly for efficiency over the power control range. Additional power control dynamic range can be obtained through the phase path stages, to satisfy the CDMA requirement of ~80 dB of power control dynamic range.

The interface requirements discussed do not reflect or represent any specific implementation, but rather summarize and introduce the type of signals that would be required in a typical wireless standard on an RFIC interface and possible ways to communicate such signals.

I/Q data interface: Since the DTx operates in a fully digital mode, it is most efficient when it is supplied with digital I/Q data in addition to the control signals associated with the operation of the DTx. Various scenarios could be thought of, for example, the DTx can be supplied with only the symbol-level I/Q representation. Then, pulse-shaping can be done within the DTx, provided that the associated filter coefficients, sampling rates, etc. are supplied on the control signals. The digital interface can be serial or parallel. Providing the symbol-level I/Q data is probably the most suitable form for SDR, since symbol-level signals require the lowest possible sampling rate. In addition, deciding on parameters such as the I/Q symbol bit-width becomes performance-independent, since the symbol-level bit-width is directly and exactly defined by the modulation scheme rather than by the implementation quality of the pulse-shaping filters, which are implementation-dependent.

Control signals interface: The control signal interface would carry information such as pulse-shaping filter coefficients, clock rates, sampling rates, power amplifier AM/AM/PM correction tables and power control-related information. The control signals interface can be parallel or serial.

Multicarrier operation: In order to accommodatemulti-carrier operation, one can think of several architectures that can make use of the DTx digital nature. The “brute force” architecture is to build one DM module and multiple DPAs for the multiple carriers that need to be transmitted. The DM module can then be configured/programmed to support the multi-carrier operation and will be equipped with multiple output interfaces to provide the multiple amplitude signals and their corresponding phase-modulated RF carriers to the DPAs. Clearly, an RF mechanism is needed in order to couple/superimpose all the modulated carriers onto one antenna (or array of antennas).

Finally, we offer a somewhat generic interface that has the feature of allowing a control message to be passed along with a data packet. The following IDL code fragment offers such an interface^[7]:

1. NSA Cross Organization CAPI Team, “Security Service API: Cryptographic API Recommendation” Object Management Group, 95-06-06, 12 June 1995.

2. Systems Interface Working Group, “API Position Paper,” SDR Forum SDRF-03-A-0005-V0.00, July 19, 2003.

3. S. A. MacLaird, Col., USAF, “Application Program Interface (API) Policy,” Department of the Army JTRS Policy 002, June 24, 2003.

4. B. Fette, “Speakeasy Phase II,” SDR (MMITS) Forum, June 11, 12, 1996.

5. P. Cook, “The MMITS API Definition Process,” SDR (MMITS) Forum, March 17, 1998.

6. D. Beyer, et. al, “Radio Device API,” Roof Top Communications, July 11, 1998, http://www.ir.bbn.com/projects/udaan/udann-index.html.

7. Walid K. M. Ahmed and John Bard, “Application Program Interface for Digital Polar Transmitter,” In Proc. of the 2004 Software-Defined Radio Forum Technical Conference (SDR'2004), Phoenix, AZ, U.S.A, Nov. 15-17, 2004.

8. DigRF Baseband/RF Digital Interface Specification, v 1.12.

9. Steve Hurwitz, “Digital Polar Design Facilitates Multimode Transmitters,” RF Design, February 2004 (Defense Supplement).

10. Walid K. M. Ahmed, David Bengtson and Patrick O'Horo, “DTx: A Revolutionary Digital Front-End Transmitter Technology to Provide Multimode-Multiband Capability,” In Proc. of the Software-Defined Radio Forum Technical Conference (SDR'2004), Phoenix, AZ, U.S.A, Nov. 15-17, 2004.

11. Pierce Nagle, Radwan Husseini, Andrei Grebennikov, Walid K. M. Ahmed and Finbarr McGrath, “A Novel Digital Wideband Power Amplifier and Transmitter Architecture for Multimode Handsets,” in Proc. of the IEEE 2004 Radio and Wireless Conference (RAWCON'2004), Atlanta, GA, U.S.A, Sept. 19-22, 2004.

Walid K. M. Ahmed received a B.S. degree in electrical engineering (distinction with honor) from Ain Shams University, Cairo, Egypt, in 1991 and the Ph.D. degree in electrical and computer engineering from Queen's University at Kingston, Ontario, Canada, in 1997. From August 1997 to November 2001, Ahmed was with Bell Laboratories, Lucent Technologies, Holmdel, NJ, as a member of the technical staff. Since November 2001, Ahmed has been with M/A-COM, Tyco Electronics (a division of Tyco International), where he is now the technical lead and senior principal engineer of the Systems Engineering Group. Ahmed holds eight U.S. patents and has more than 30 pending patents. He has also authored/co-authored more than 40 original research articles. He is a senior member of the IEEE and an adjunct professor with the Stevens Institute of Technology in New Jersey.

Elias Kpodzo is currently with M/A-COM, Tyco Electronics, where he has been a principal engineer since January 2004, working in the Systems Engineering Group on CDMA2000 and GSM/EDGE mobile transmitter products development. Kpodzo received his PhD in microwave and millimeter-wave engineering from the Technical University of Braunschweig, Germany. After seven years as a senior member of scientific staff with Bell-Northern Research (Nortel) in Ontario, Canada, he joined Lucent Technologies (formerly AT&T), New Jersey in 1995 as a member of the technical staff in the CDMA handset design group. In 1998 he joined iBiquity Digital Inc. (formerly Lucent Digital Radio) as manager-receiver products, technology transfer team. Kpodzo has a number of patents and publications to his credit. Kpodzo is a senior member of IEEE.