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A wealth of information is available on the topic of phase noise, its A characteristics, how it can be measured, and how it affects system performance. It is well known that phase noise in oscillators and clocks becomes one of the limiting degradations in modern radio systems. However, most of the traditional analyses concentrate on degradations to sine wave signals in single carrier radio systems. The effects of phase noise on multicarrier receivers, wideband systems or digital radios are rarely discussed.

The easiest way to calculate the signal-to-noise (SNR) degradations incurred by phase noise in a sampled data system is to convert phase noise to phase jitter. This is most easily accomplished by recognizing that a time delay is the same as a phase delay at a given frequency. Extending this concept and writing it in terms of noise power yields Equation 1.

where σθ = phase noise in rms radians

στ = phase jitter in rms seconds

ω_clk = clock frequency in radians/sec

For a given jitter error, a higher frequency signal will have more phase error. The term σθ is the total integrated phase noise of the clock and defines the clock SNR by

Thus, Equation 1 relates the total integrated phase noise, or clock SNR, to the total jitter in the clock. Phase noise and clock jitter are two different ways to look at the same phenomenon.

Traditional sampled data SNR analyses uses Figure 1 as an aid to determine how noise on a clock generates an error in the sampled data. From this it is seen that

zero mean, independence.

Therefore,

where is in (rms seconds)^2.

From this it is seen that the noise power is a function of the jitter power and the power in the signal derivative.

The SNR of a signal sampled with a jittery clock is defined as

For example, in a single sinewave,

Therefore,

Using Equation 2,

This is the standard SNR equation for a single sinewave sampled by a clock with jitter and can be found in many publications.

Intuitively what is happening is that higher frequency signals have larger slew rates. This results in larger voltage changes as the sample time changes. It should be remembered that quantization noise and thermal noise must also be added to this to obtain the total noise out of a data converter.

Extending this to a multicarrier signal is a simple matter. Using the same procedure as before with v_out defined as a summation of n equal amplitude sinewaves,

This is relative to the entire signal, v_out. When referenced to only one of the carriers, the SNR becomes

Compared to the single carrier case, Equation 3, the denominator has n more frequency terms. The SNR on a per carrier basis (i.e., dBc) has been degraded by approximately 10log(n). However, in a data converter, each carrier may need to be reduced by 10log(n) to 20log(n), depending on signal statistics, to keep from clipping the quantizer. This, in effect, raises the quantization and thermal noise floor by up to 20log(n). Thus, jitter may contribute less to the overall SNR than in the single carrier case. Quantization and thermal noise may become more dominant.

Many modern radio systems don't use narrowband carriers. Modulated data often occupy a wide spectrum. To determine how clock jitter affects the SNR for such systems, assume the data have zero mean and a flat spectrum uniformly distributed between ƒL and ƒH, ƒL < ƒH as shown in Figure 2. When squared and integrated over its bandwidth, the total signal power is obtained.

One form of Parseval's Theorem states that the power of a signal in the time domain equals the power of the signal in the frequency domain. That is,

where is the power spectral density in Watts/Hz.

In addition, using the Differentiation Theorem of the Fourier Transform, which states that the Fourier Transform of a derivative is just the Fourier Transform of the original function multiplied by iω, as shown below,

and combining this with Parseval's Theorem, it is seen that the power in v'(t) is the same as the power in iω g(ω), as described below.

For only between ƒL and ƒH (and zero everywhere else), this becomes

Using Equation 2,

This is the SNR resulting from a flat, wideband signal between ƒL and ƒH being sampled by a clock with jitter σt. As a sanity check, setting ƒL = ƒH = ƒO (i.e., all the power resides in a single frequency term ƒO) results in the same expression as Equation 3 for the single frequency case.

An alternative expression is obtained by letting ƒL = ƒO-BW/2 and ƒH = ƒO+BW/2. For this case the expression becomes

Again, as a sanity check, when BW=0 the result matches the single carrier case in Equation 3.

A consequence of all of this math is that as long as ƒO>10BW, the bandwidth of the signal can probably be neglected. Treating the modulated signal as a single carrier will give virtually equal results. However, if this is not true, then using the single carrier approximation will give results that are too optimistic.

This entire discussion focused on sampled data systems, but nowhere were the effects of aliasing mentioned. All of the equations derived above assume there is no aliasing. The bandwidth of the jitter is considered to fall entirely (and conveniently) into a single Nyquist zone. If the jitter is bad enough, and the signal close enough to a Nyquist edge, the noise caused by jitter can alias back in band, degrading SNR even further. This effect is illustrated in Figure 3. A similar problem exists with clock feedthrough. If the signal is close to the clock, phase noise from the clock can directly leak to the output, degrading the noise floor.

Nowhere in the preceding discussion did the spectrum of the clock phase noise come into play. All that was considered was the total jitter (in rms seconds), which was calculated from the total integrated phase noise using Equation 1. To see how the phase noise spectrum of the clock affects the sampled data spectrum, use a single sinewave signal. Combining Equation 1 with 3 yields Equation 6.

The SNR of the resulting sampled signal is the same as the SNR of the clock but scaled by the clock and signal frequency ratio. As the signal frequency gets higher, the SNR degrades in a 20log fashion. This illustrates why under-sampled systems (i.e., one in which the signal frequency occupies one of the higher Nyquist bands) require clocks with much better phase jitter than baseband systems. In fact, performance in IF-sampling digital radio architectures are often limited by clock phase noise, not data converter performance.

Although not apparent from Equation 6, the spectral shape of the clock phase noise is super-imposed on the sampled data, as illustrated in Figure 3. This can intuitively be seen by modeling the sampling process with a mixer. As shown in Figure 4, when a clock with phase noise θ is applied to a mixer, the output contains two mixing products, each of which contains the full phase noise θ of the clock. Although this simplistic model does not show the scaling factor described in Equation 6, it is useful to show how the phase spectrum of the clock shows up on the resulting signal.

This can easily be tested by phase modulating a clock and feeding it into an ADC. By applying different signal frequencies, Equation 6 can also be verified. An AD9430 ADC was clocked at 61.44 MHz with a clock phase modulated such that the first sidebands were -60 dBc. Figures 5a, 5b, and 5c show the results of the experiment.

Figure 5a shows the results with a 3.84 MHz input. The clock modulation components can be seen as the two small spurs clustered close to the signal fundamental. According to Equation 6, the clock modulation spurs should be -60 - 20log(61.44/3.86) = -84 dBc. The results in Figure 5a are close to this number.

Figure 5b shows the results with a 65.28 MHz input. This is in the third Nyquist zone. The FFT shows the baseband alias in the same location as the 3.84 MHz signal in Figure 5a (i.e., 65.28 MHz - 61.44 MHz = 3.84 MHz). Here f_clk ˜ f_sig and the -60 dBc clock spurs can readily be seen super-imposed on the signal, also at 60 dBc. This is to be expected according to Equation 6.

Figure 5c shows the results with a 124.72 MHz input, in the fifth Nyquist zone. This frequency is about twice that of Figure 5b and according to Equation 6, the spurs should increase about 6 dB, which is what is seen.

Thus, it appears that the clock spectrum does indeed appear around the sampled signal with a scaling factor described by Equation 6. However, so far all of the preceding discussions have not differentiated between ADCs and DACs. Do DACs exhibit the same characteristic seen by ADCs? A similar experiment was run on an AD9744 DAC using a 61.44 MHz clock phase modulated to give -40 dBc sidebands, generating an 11 MHz sinewave. The results over five Nyquist bands are shown in Figure 6.

The Sinc function inherent in DAC outputs can clearly be seen. But what is happening with the clock spurs? These are seen at each of the output images but the amplitudes don't increase as they did with the ADC. Relative to fullscale, the spur amplitudes remain constant.

There are several ways to look at this. When viewed in dBc, as the signal frequency goes up, the modulation spurs get worse in the same manner as described by Equation 6. The Sinc function applies to both the signal amplitude and the induced clock phase noise. Calculating the spur amplitude relative to each carrier (i.e., in dBc), Equation 6 is a good description.

Alternatively, the Sinc characteristic is defined as

The amplitude of the noise is given by the reciprocal of Equation 6.

That is, the noise is directly proportional to clock phase noise and signal frequency. Squaring the Sinc function (because power spectral densities are being examined) and multiplying these two to get a composite noise transfer function out of the DAC yields

The periodic nature of the nulls caused by the sinusoid still exist. However, the denominator of the Sinc function is what causes the roll-off at higher frequencies. This attenuation has been exactly canceled by the increasing phase noise at higher frequencies described by Equation 6. Thus, the phase noise out of a DAC will not grow at higher frequencies.

Besides the obvious issues revolving around designing systems to minimize signal degradations, several other consequences from these results are worth mentioning. These are related to finding the source of mystery spurs and noise. For instance, if the noise floor rises at the DAC output, it is most likely not caused by clock phase noise. It is probably digital coupling into the output circuitry.

If a spur exists in a sampled signal, a good test to see if it comes from the clock is to change the signal amplitude. Analog distortion terms will change at twice (second-order distortion) or three times (third-order distortion) the rate of the signal amplitude change. Spurs due to non-linearity in the quantizer may not change at all, or if they do change they will change unpredictably, when the signal amplitude changes. On the other hand, spurs due to the clock will change decibel for decibel with the signal.

When trying to identify the source of a spur in a sampled data signal, look not only at the explicit spur frequency, which could be caused by a signal directly coupling into the output, but also at the frequency offset from the signal. For example, if a spur is 10 MHz away from the carrier, look to see if there is a 10 MHz oscillator somewhere in the system. If so, this frequency is most likely leaking in through the clock.

The author would like to thank Gary Hendrickson for making the measurements on the AD9430 and Steve Reine for the measurements on the AD9744, both applications engineers from Analog Devices, Inc.

1. W. P. Robins, Phase Noise in Signal Sources, Peter Peregrinus Ltd., London, 1982.

2. Understanding and Measuring Phase Noise in the Frequency Domain, Hewlett Packard, Application Note 207, 1976.

3. Stanley J. Goldman, Phase Noise Analysis in Radar Systems Using Personal Computers, John Wiley & Sons, New York, 1989.

4. Mini-Circuits, VCO Phase Noise, Application Note No. 2.

5. Linear Design Seminar, Analog Devices, Inc., Norwood, Ma, 1995, pg. 5-20.