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Many RF front-end integrated circuit (IC) devices used in today's handsets employ a differential open-collector (OC) output structure for the active mixer stage. This configuration allows the customer flexibility in setting the output impedance, conversion gain, and linearity of the mixer. These front-ends can be used effectively with both differential and single-ended surface acoustic wave (SAW) filter configurations. This article describes techniques for the design of output network circuitry for optimum mixer performance based on the parameters of the intermediate frequency (IF) SAW selected for the application.

The performance of radio-frequency mixers can be quantified by standard figures-of-merit, including conversion gain, linearity, port-to-port isolation and noise figure.

Linearity, as expressed by the third-order intercept point (IP3), and conversion gain depend on the output impedance of the mixer. Since active Gilbert-cell type mixers manufactured by a bipolar junction transistor (BJT) IC process, typically have open-collector transistors as outputs (due to the prohibitive cost of integrating passive components), the output impedance of these mixers can be controlled externally by the end user. This ability to alter the output impedance allows flexibility in controlling the mixer conversion gain and linearity.

The conversion gain of a mixer is often a confusing specification. Some textbooks define mixer conversion gain as the actual power delivered to the load, P_L, at the IF frequency divided by the power available from the source, P_avs, at the RF frequency¹. In standard terminology this power gain is the transducer power gain, G_T, of the mixer as expressed by the following equation:

where P_avs is the power available from a given source. If a conjugate match is inserted between the source and the mixer input, the power at the input of the mixer will equal P_avs.

The transducer gain depends on the interstage coupling between the output of the mixer and the load (normally an IF channel-selecting SAW filter). If a conjugate match is not present between the output of the mixer and the load, the power delivered to the load, P_L, will be less than the power available from the mixer output. It is desirable to eliminate this dependence on the load impedance by expressing the conversion gain of the mixer as the available power gain, G_A, as follows,

where P_avo is the power available from the output of the mixer. If a conjugate match is inserted between the mixer output and the load, P_L will equal P_avo.

Since the transducer gain of a mixer is dependent on the specific application in which the mixer will be utilized, it is not a useful figure-of-merit for specifying the performance of a stand-alone mixer. Expressing the conversion gain of the mixer as the available power gain allows IC manufacturers to provide a meaningful figure-of-merit to customers independent of specific load conditions.

In general, the output impedance of an OC mixer is highly resistive due to the role of the mixer output transistors as current drivers. Some associated shunt capacitance also exists. This capacitance is usually small and due in part to the shunt collector capacitance of the mixer output transistors, but mainly attributable to the actual IC package parasitics and printed circuit board (PCB) capacitance.

This high output impedance condition bodes well for the conversion gain of the mixer, but not as well for its linearity since the high impedance creates large voltage swings at the mixer output. These voltage swings can saturate the mixer output transistors, reducing the linearity of the mixer. In order to improve mixer linearity, the impedance at the open-collector transistor outputs must be reduced.

Therefore, a conjugate match directly between the OC outputs and the IF load (e.g. an IF SAW filter) does not generally achieve optimum mixer performance. Better performance is achieved by designing an OC network that reduces the inherent impedance of the current-driving OC output transistors. In essence, this OC network defines the output impedance of the mixer and determines mixer performance. This newly defined impedance can be used as the output impedance to be interfaced to the IF load and is usually the reference point at which the figures-of-merit for the mixer, including G_A and IP3, are measured and specified by the mixer IC manufacturer, as illustrated in Figure 1.

The OC output impedance can be reduced by adding resistive or frequency-dependent components. One method is simply to place a resistor across the OC outputs of the mixer (see the Resistive output network in the examples section). This provides a frequency independent impedance that is set purely by the resistor.

Even better performance for both gain and linearity can be achieved by utilizing more sophisticated output networks. These types of networks include frequency dependent circuits that need to be tuned to the appropriate IF frequency. The current combiner network (see the current combiner output network), in particular, is advantageous because it creates an artificially high impedance for the mixer output transistors to drive (good for conversion gain) while providing a mechanism for increasing the linearity (good for IP3) via the circuit topology.

It is also possible to use the IF SAW filter itself to reduce the impedance of the OC outputs (see the Direct-to-SAW output network). In this case, the reference point for the conversion gain and linearity of the mixer is moved to the output of the cascaded mixer and IF SAW. With this topology, the SAW itself defines the mixer performance by reducing the output impedance of the OC transistors.

There are, therefore, two design considerations that must be addressed when working with OC mixers. The first has to do with reducing the inherently high impedance of the OC transistor outputs so that the mixer performance is adequate. The second involves interfacing the mixer to the IF load. A discussion of potential OC output networks that address these considerations follows. Examples of a single-ended output network and several differential output networks are included.

The current combiner network² can be used when the differential OC mixer outputs are required to drive a single-ended load. At a resonance frequency, the current combiner network aligns the out of phase IF+ and IF- mixer outputs in phase before summing, or combining, the currents. This results in a single-ended output with a larger AC current signal swing. The current combiner network is illustrated in Figure 2, where:

• Z_oc = impedance of the OC transistors. Z_oc = a high impedance port.

• Z_diff = load impedance presented to the OC transistors (this determines mixer performance).

• Z_out = output impedance of the OC output network. G_A and IP3 are normally specified at Z_out.

To determine the resonance frequency, ω₀, and the output impedance, Z_out, of the current combiner network, the impedance equation for the network must be examined. Assuming the output impedance of the OC transistors, Z_oc, is high, the following equation for the output impedance of the current combiner network, Z_out, is obtained by:

(1)

where s = jω = j2πf.

By definition, at the resonance frequency: I_m(Z(jω₀)) = 0.

(2)

Of the four roots of equation (2), only two are possible positive real roots:

(3)

, and

(4)

where:

(5)

(6)

and:

(7)

For the network to resonate, α must be positive. If β₁ is positive, ω₀₁ is a resonance frequency; if β₂ is positive, both ω₀₁ and ω₀₂ are resonance frequencies. Therefore, the current combiner network can have two, one, or zero resonance frequencies.

The output impedance for the current combiner network at the ω₀₁ resonance frequency is given by:

(8)

The output impedance for the current combiner network at the ω₀₂ resonance frequency is given by:

(9)

Since there are five variables (the resonance frequency, the output impedance at resonance, R, L, and C) and two design equations, ω₀ and Z_out, three of the variables must be chosen in order to design the current combiner network. It is desirable to specify the resonance frequency and the output impedance at resonance, so one of the current combiner element values must also be chosen to complete the design. Solutions to the system of equations results in the following design equation methods.

Method one:

(10)

(11)

Method two:

(12)

(13)

Method three:

(14)

R = ε (14)

and:

(15)

where:

, and

The equations for the current combiner network components are constrained by the conditions for resonance, as stated in terms of a, β₁, and β₂ above. Since the resonance frequencies, ω₀₁ and ω₀₂, are not independent, designing for a specific ω₀ and Z_out with the above equations and then evaluating α, β₁, and β₂ will indicate whether ω₀₁ exists and whether or not ω₀₂ also exists.

While the above design equations are exact, for ease of use and improved design intuition it is desirable to find approximated design equations that depend solely on the reactive elements in the network (L and C) for setting the resonance frequency. In this case, the R value will be independent of the resonance frequency and will be used only to set the desired output impedance of the current combiner network at resonance.

To find these simplified design equations, it is observed that the case of a current combiner network with the resistor removed has a resonance frequency determined solely by the reactive elements (the only elements present). Taking the limit of the resonance frequency equations (3) and (4) as R approaches infinity results in the following simplified resonance frequency equations,

(16)

(17)

Likewise, the simplified equations for the output impedance of the current combiner network at resonance can be found by evaluating the real part of equation (1) with w set to ω*₀₁ and ω*₀₂ from equations (16) and (17),

(18)

(19)

It is observed that the impedance at ω*₀₁ depends solely on R, but that the impedance at ω*₀₂ depends on R, L, and C.

In order to quantify the accuracy of the approximated design equations for the resonance frequencies, an error function, err_ω, can be defined as:

(20)

The error function is constrained by the requirement that the resonance frequency for which the error function is defined must exist, i.e. ω0 (ω₀₁ or ω₀₂) must be a positive real number.

The error function can be expressed as a function of R for a given resonance frequency. Figure 3, below, plots the error function for a resonance frequency of 159 MHz as a percent error versus R (from 10 to 2000 Ω) for three distinct values of C (10 pF, 20 pF, 100 pF).

As indicated by the above plot, for a given resonance frequency the accuracy of the approximated design equations (16) and (17) improves with increasing R, as expected. Also, as a function of C, the accuracy of the equations improves with increasing C for a given value of R.

For matching the differential mixer output to a differential load such as a balanced SAW filter, several topologies can be used. However, the following recommendations are made:

• The shunt capacitors, C, used in the current combiner network should also be used in the differential output network. These capacitors provide a shunt to ground for harmonics which can saturate the output transistors, and are required to maintain optimum IP3 performance.

• The IF+ and IF- mixer signals form a balanced IF output. To maintain common-mode rejection, the differential output network circuitry should be designed symmetrically. If one component is added to the IF+ signal path, the same component should be added to the IF- signal path. For instance, the same bias choke inductor should be added to each IF output of the mixer.

• Due to the dependence on frequency of the performance of discrete components, if circuit simulation software is used to generate initial values for output network components, the simulation should use real or [S]-parameter models of the discrete components. These models are generally available from the component manufacturers. The transmission line effects of the PCB must also be modeled for accurate results.

• The self-resonance behavior of shunting capacitors placed at the OC mixer outputs should be considered.

  High-frequency harmonics are generally present at the OC outputs due to the local oscillator (LO). If these harmonics are above the capacitor self-resonance frequency, the increased impedance presented by the capacitor may actually contribute to the saturation of the output transistors and reduce mixer linearity. The technique of adding a capacitor across the IF+ and IF- mixer outputs illustrated in Figure 4 and discussed in the current combiner output network example of the next section can also be applied to differential output networks.

• Reducing the quality factor (Q) of inductors in the output network with a de-Q'ing resistor can provide increased flexibility in setting the performance and impedance of differential output networks.

This section presents examples of practical output networks for OC mixers. Current combiner output network

L₁, C₁, C₂, and R form a modified version of the current combiner network as shown in Figure 4. The network is designed to resonate at the IF frequency and to present a desired real impedance to the IF load at the resonance frequency.

The approximate design equation for the modified current combiner resonance frequency is given by the equation:

(21)

Where C_eq is the equivalent stray capacitance and capacitance looking into IF+ and IF-. This capacitance varies slightly with transistor device type and, in general, C_eq is between 1.5 and 4 pF.

The approximate design equation for the network output impedance is given by:

(22)

where R_p is the parasitic equivalent parallel resistance of L₁ and Z_out is the desired network output impedance (normally equal to the IF load impedance).

Initially, C₂ should be omitted, i.e. set to zero in equation (21), and C₁ should be chosen as large as possible (suggested < 20pF due to its self-resonance frequency), while maintaining an R_p of L₁ that allows for the desired Z_out. The shunt capacitors, C₁, have a double purpose. In addition to determining the resonance frequency of the current combiner as described in equation (21), they provide low-impedance shunt terminations to high-frequency harmonics and improve linearity.

If the resonance frequency of the current combiner is correct, but the selected components produce unsatisfactory linearity performance, the value of C₁ may be reduced and compensated for by including C₂ with a value chosen to maintain the desired IF frequency.

L₂ and C₃ serve dual purposes. L₂ serves as an output bias choke, and C₃ serves as a series DC block. In addition, L₂ and C₃ may be chosen to form an impedance matching network if the input impedance of the IF filter is not equal to Z_out. Normally, however, Z_out is designed to equal the input impedance of the IF filter. In this case, L₂ is chosen to be large (suggested 120 nH) and C₃ is chosen to be large (suggested 22 nF) if a DC path to ground is present in the IF filter, or omitted if the filter is DC blocked.

Figure 5 illustrates the recommended setup for measuring the current combiner resonance frequency. C₁ should be adjusted until the circuit resonates at the desired IF frequency and R adjusted until the desired Z_out is obtained.

An example of the current combiner network discussed above is presented in Figure 6 with a personal communications system (PCS) code-division multiple access (CDMA) low-noise amplifier/mixer tuned for the U.S. PCS band. The desired Z_out is 1000Ω at an IF frequency of 210 MHz.

Due to the self-resonance frequency of C₁, the C₂ component is included. Choosing L₁ = 82 nH, C₁ = 4 pF, C₂ = 3 pF, C_eq = 4.0 pF and using equation (21), f_IF = 210.18 MHz. Measuring the current combiner response on the evaluation board with a network analyzer will show that the circuit resonates at 210 MHz.

The value of R is determined by equation (22). However, in some cases, the resistor, R, is not required to achieve the desired network output impedance, Z_out. A practical approach is to omit R and measure the output impedance of the current combiner network using a network analyzer, and then add a value for R which gives the desired R_out. The Q of L₁ sets the maximum achievable output impedance of the current combiner network and the resistor R operates to reduce the network output impedance by lowering the effective Q of L₁.

L₂ is only necessary as a choke to V_CC, and is therefore chosen to be large. Likewise, C₃ is only necessary as a DC block if a DC path to ground is present in the IF filter.

This topology provides a simple mechanism to reduce the impedance of the OC outputs and to match the reduced impedance to the input impedance of the IF SAW filter. Adding a resistor across the differential OC output pins provides a frequency independent fixed impedance (see figure 7). L₁ and C₁ are chosen to resonate at the desired IF frequency. C₁ can be omitted and the value of L₁ increased and utilized solely as a choke to provide V_CC to the OC outputs, but it is recommended that at least some small-valued C₁ (a few pF) be retained for better mixer linearity performance. R is normally selected to equal the input impedance of the IF filter (assuming the filter input impedance is real). However, mixer performance can be modified by selecting an R value that is different from the IF filter input impedance, and inserting a conjugate matching network between the resistive output network and the IF filter.

With this network, the inherent input impedance of the SAW is used to reduce the high impedance at the OC transistors. If the input impedance of the SAW itself is sufficient to reduce the impedance of the OC outputs while providing adequate mixer performance, this network is recommended. Figure 8, illustrates the network topology.

Most IF filters used today are SAW filters which, in general, are somewhat capacitive. If this is the case, L₂ should be chosen to resonate with the internal capacitance of the IF SAW filter. If the IF SAW filter has a DC path to ground, C₂ is required. In essence, L₂ and C₂ transform the inherent complex impedance of the actual SAW filter to a real load impedance.

L₁, C₁, and C_eq should be resonate at the desired IF frequency. If the IF filter doesn't have a DC path to ground, an alternative topology is eliminating C₂ and L₂. In this case, L₁ should be chosen to resonate with C₁, C_eq, and the internal capacitance of the IF SAW filter.

One approach to providing an output network is to simply conjugately match the impedance of the OC outputs to the input impedance of the IF SAW filter. In general, this network produces large voltage swings at the collector outputs and may not be sufficient to provide the required linearity in high linearity mixer applications. Figure 9 illustrates the network.

L₁ and C₁ in combination with C_eq form a tank circuit which resonates at the desired IF frequency. The conjugate matching network will provide maximum power transfer at the cost of reduced linearity.

If the above solutions prove unsatisfactory, the network illustrated in Figure 10 can be used.

In this case, L₁, C₁, and C_eq should resonate at the desired IF frequency. L₂ and C₂ may be chosen to form an impedance transformation network, in addition to their roles as bias elements. Although similar in appearance to the current combiner topology, the above network operates in a dissimilar manner. If L₂ and C₂ are chosen to perform a conjugate match between Z_out and Z_load, this network reduces to the conjugate match network. If the values of L₂ and C₂ are chosen to be large, the network reduces to the direct-to-SAW network. However, the alternate output network allows the designer more flexibility in the selection of practical component values and may improve the performance of the mixer over similar networks.

The performance of an OC mixer is highly dependent on its output network. Therefore, achieving optimum performance with OC mixers requires the design of an appropriate output network. The selected network must reduce the inherently high output impedance of the OC transistors, as well as, provide an interface to the IF load such that the cascaded performance of the mixer and IF load is sufficient for the given application. Several types of output networks are available for both single-ended and differential IF loads, increasing the flexibility of use of OC mixers.

1. B. Razavi, RF Microelectronics. Upper Saddle River, NJ: Prentice Hall, 1998.

2. M.B. Judson, Philips Application Note AN1777, 1997.

3. Ron Turner, RF Micro Devices, Inc., private communication, July 2000.

Barry Hunt is a senior design engineer with RF Micro Devices Inc.. He received the B.S.E.E, with highest honors, and the M.S.E.E. from the Georgia Institute of Technology in 1997 and 1998, respectively. He holds a patent in the field of phase-locked loop design, with others pending. His current focus is mixed signal wireless IC design. He can be reached at 336-931-7033 or by email at bhunt@rfmd.com.

Walter Prada joined RF Micro Devices in 1999 and is an RFIC design engineer in the digital cellular product line. He received his bachelor's degree in EE from the Universidad Metropolitana in Caracas, Venezuela and his master's degree in EE from the University of Texas at Arlington. He may be reached via e-mail: wprada@rfmd.com.

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