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At this year's IEEE International Microwave Symposium in June, panelists discussed the pros and cons of various methods that enable system-level verification of RF circuits. In the olden days, meeting specifications was enough. But it seems today the question teams want to answer before committing to a tape-out is, “Will this RF circuit work in the target system?” where the target system is typically a complicated signal processing or communication system, including hardware and embedded software.

The panelists include:

• Colin Warwick, communication product manager, The MathWorks;

• Juergen Hartung, senior technical marketing manager, design methodology kits, Cadence Design Systems;

• Niranjan Kanaglekar, R&D section manager, Agilent EEsof EDA, Agilent Technologies;

• Jan Niehof, innovation consultant, RF & EM EDA, Philips Research Laboratories;

• Ray Arkiszewski, senior applications engineer, RF Micro Devices; and

• Yasunori Miyahara, senior engineer, Network Development Center, Matsushita Electric Industrial Co. Ltd.

Question 1: What changes occurred to bring about this additional requirement?

Warwick: Let me illustrate with an example. You can achieve a low bit error rate (BER) either by using super low-noise RF components or by using a forward error correction (FEC) scheme such as turbo coding. Moore's Law applies to analog, RF and digital chips, but the fact is that digital electronics have been getting cheaper faster than RF or analog, and this increasingly favors the addition of digital signal-processing techniques to televisions, radios and radars that were traditionally 100% RF and analog. Now you have to get the two teams to work together: the signal-processing team, who mainly think in the baseband complex equivalent, time domain representation (also called the envelope time domain), and the RF team, who mainly think in the real carrier, frequency domain representation. The problem is, “How do we get them on the same page, so the system works?”

Hartung: Today's mobile communication systems use sophisticated signal processing to achieve high transmission rates. The challenges for next-generation wireless systems will increase even further when designs must be targeted to multistandard and reconfigurability. The complexity of digital signal processing is also steadily growing. The digital blocks offer the capability to compensate some of the signal impairments caused by analog front-end blocks. To verify the complicated digital compensation algorithms and the effect of analog non-idealities such as phase noise, non-linearity and mismatch, the analog and the digital blocks need to be simulated together.

Niehof: The trend to more and more (mobile) functionality such as multimode, multiband and multistandard is continuously ongoing. In order to design this cost-effective and energy-efficient (long battery life), RF, analog, mixed-signal and digital blocks are integrated on to one chip (RF SoC). In these state-of-the-art RFCMOS processes, it is difficult to design proper-performing analog/RF circuits. Shifting more analog functions into the digital domain compensates this. The bad RF performance is typically compensated/corrected via digital feedback loops. In order to verify these compensation/feedback loops, we need to be able to simulate across all domains, from RF, via analog, mixed signal, digital to the baseband processor.

Kanaglekar: There are two trends I see that are bringing this additional requirement into the picture: The first one is already mentioned by my colleagues on this panel: shifting more analog/RF functions into digital domain because of performance/cost pressures and shrinking geometries. The second one has to do with the complexity of signals that individual analog/RF blocks are subject to. In the wireless communications area, the days of an RF engineer designing an RF component only to traditional RF specs such as noise figure, IP3, 1 dB compression point, etc. are gone. The system designer needs to know if individual RF components will work in the overall system with the system specs such as BER, EVM, CCDF, etc. These days, RF block designers are verifying their blocks not just with one- or two-tone CW carriers, but with highly complex modulated signals specified by the wireless communications standards.

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