Diode Limiters Help Protect Receivers
Apr 11, 2012 5:56 PM Skyworks Solutions, Inc.
Fast-acting PIN diode limiters can prevent high-level signals from damaging a receiver’s front end, while still enabling the receiver to capture critical signal information.
Radio and radar receivers must handle wide dynamic ranges to be successful. This includes providing high sensitivity for low-level signals, with the capability of surviving much larger signals over the same operating frequency range. Protection for a receiver’s low-noise amplifier (LNA) and other sensitive components often comes in the form of a diode limiter, which can block high-power signals when present but still allow the receiver to function normally with lower-level signals.
In a typical radar transceiver, a limiter prevents high-level signals from damaging sensitive components in the receiver’s input signal path, such as a frequency mixer (Fig. 1). In its simplest form, a diode limiter consists of a PIN diode and an RF choke inductor, both in shunt with the main signal path (Fig. 2). In most limiter circuits, DC blocking capacitors are included at the input and the output of the circuit. A single-stage limiter can typically reduce the amplitude of a large input signal by 20 to 30 dB.
The shunt PIN diode functions as a variable resistor, with resistance controlled by the amount of power applied. When the incident power is low, the impedance of the limiter diode is at a maximum, resulting in minimum insertion loss—typically less than 0.5 dB. High incident power will transform the diode’s impedance into a much lower value, resulting in an impedance mismatch that reflects most of the input signal power back towards its source.
Figure 3 shows a nominal output-power-versus-input-power transfer curve for a single-stage diode limiter. By reflecting the power rather than dissipating it, the diode is protected from damage, assuming that the excess energy can be reradiated through a system antenna or directed by a nonreciprocal component, such as a circulator/isolator, to a resistive load to dissipate the power. When the large signal is no longer present, the diode’s impedance switches back to its maximum value, after a brief delay time.
A PIN diode limiter relies on the simple but elegant operation of its semiconductor to protect a receiver from high-level signals. A PIN diode consists of positive (P), intrinsic (I), and negative (N) layers. When a large-level input signal—and its associated electric field—impacts the diode, it will drive positive charge carriers or holes from the P layer and negative charge carriers or electrons from the N layer into the nominally undoped and high-impedance I layer.
This movement of carriers to the I layer temporarily reduces the diode’s impedance to a much lower value. A PIN limiter diode’s minimum and maximum impedances are determined by the diode’s geometry, as well as the resistivity of the I layer.
The P layer is usually quite thin, featuring extremely low resistance. It is heavily doped with p–type acceptor impurities. The N layer is usually the thickest of the three layers. It is heavily doped with n-type donor impurities. It has low resistivity but usually exhibits some small amount of resistance, which is a major constituent of the minimum resistance of a limiter PIN diode.
The N layer also plays a significant role in determining a PIN diode’s thermal resistance. The middle layer of the PIN diode’s three-layer sandwich, the I layer, is nominally undoped but more typically lightly doped with p-type donor impurities. It is capable of resistance on the order of many hundreds to a few thousand Ohms.
The I layer resistance can be modulated by forcing charge carriers into it from the P and N layers, achieved by applying forward bias voltage or current to the diode. The I layer resistance is exponentially indirectly proportional to the current flowing through the diode:
RILAYER = k(I–α) + RBULK
RILAYER = the series resistance of the I layer;
The resistance of a diode’s I layer can also be expressed in terms of bias current and physical properties:
RILAYER = w2/(2IFμATL)
RILAYER = the series resistance of the diode’s I layer;
Parameter μA, the ambipolar carrier mobility, is defined as:
μA = (μN + μP)/2, where μN is the electron carrier mobility and μP is the hole carrier mobility.
The I layer resistance and minority carrier lifetime are indirectly proportional to each other. The shape and resistivity of the I layer determine a diode’s minority carrier lifetime. The layer’s thickness and doping concentration determine the diode’s reverse breakdown voltage and threshold level.
A PIN diode’s total resistance equals the sum of the P, I, and N layer resistances, which are electrically in series. The P and N layer resistances are constants while that of the I layer varies. For a nonzero bias current, the total series resistance, RS, of a PIN diode is:
RS = RI-LAYER + RP-LAYER + RN-LAYER = K x I−α + RSAT
The three constant terms, RBULK, RP-LAYER, and RN-LAYER, are typically combined and referred to as the saturated resistance, RSAT.
In a limiter, a PIN diode will dissipate some power (PDISS) in its conduction state, with that power resulting from the product of the DC forward voltage and current and the product of the square of the RF current and the diode’s series resistance. Because the RF current through a PIN limiter diode can be large, it is often the most significant factor contributing to the amount of power dissipated.
In the conducting state, PDISS is:
PDISS = IDCVDC + I2RFRS ≈ I2RFRS
where the DC component of dissipated power is often ignored because it is minimal.
In the nonconducting state:
PDISS = V2RF/RS
Since a passive limiter PIN diode is not in conduction when very small RF voltages are present, RS remains large while VRF is small, with power dissipation negligible in this state.
A limiter’s threshold level is the input signal level at which the diode is at 1-dB compression. Threshold level is primarily determined by I layer thickness. PIN limiter diodes with the thinnest I layers yield threshold levels of about +7 to +10 dBm, while diodes with the thickest I layers provide threshold levels of about +20 to +23 dBm.
In a PIN diode, the minority carrier lifetime, TL, is the mean time that a free charge carrier exists before recombination occurs. It is directly proportional to the volume of the I layer and directly proportional to the resistivity of the I layer. Minority carrier lifetime is related to limiter recovery time: A limiter PIN diode with small minority carrier lifetime is generally desirable because it is proportional to a brief delay between the cessation of a large RF signal across the diode and the return of the diode’s impedance to a maximum value.
A limiter PIN diode’s I layer is doped with gold atoms to establish charge trapping sites, reducing the minority carrier lifetime. This is desirable for radar receiver protectors and other applications such as EW receivers. The minority carrier lifetime and series resistance of a PIN diode are indirectly proportional to each other, and must be balanced for optimal limiter performance.
The junction capacitance of a PIN limiter diode impacts the diode’s small-signal insertion loss. The junction capacitance, CJ, can be found from:
CJ = εA/d
A = the area of the diode’s junction;
ε = ε0εR
or the product of the dielectric constant of free space and the relative dielectric constant of the material forming the I layer.
A diode’s avalanche breakdown voltage is a reverse bias voltage that can cause damage to the diode. It is often defined as the voltage required to force 10 µA of current to flow in the reverse-bias direction. The minimum rated breakdown voltage should be the maximum reverse voltage applied to the diode, unless otherwise noted in the manufacturer’s specifications.
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