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FPGAs Fortified Against Counterfeiting Apr 9, 2012 4:30 PM Jack Browne, Technical Contributor These defense-grade FPGAs feature anti-tampering and anti-counterfeiting features that make them suitable for long-term applications in a wide range of mission-critical electronic systems.
Defense-grade components must be counted upon for reliable functionality under adverse conditions. To ensure that its high-performance Virtex®-6Q field-programmable gate arrays (FPGAs) do not suffer from tampering and counterfeiting, and that military electronics designers get the FPGA performance they expect, Xilinx announced the availability of its third-generation Virtex-6Q defense-grade FPGA family. These new offerings feature enhanced anti-tamper and counterfeiting features; they are optimized for systems requiring dependable digital signal processing (DSP) with serial connectivity at rates to 6.6 Gb/s under low-power operation. The Xilinx Virtex-6 FPGAs (see figure) are available in SXT and LXT product series, with a wide range of memory and processing options. Each FPGA contains four look-up tables (LUTs) and eight flip-flops, with 64-b or two 32-b LUT random-access-memory (RAM) options. The SXT series offers a high ratio of DSP processing power and memory resources, while the LXT defense-grade FPGAs include 6.6 Gb/s GTX transceivers with built-in PCIe® and tri-mode Ethernet multiplier-accumulator (MAC) blocks. The FPGAs store their customized configurations in SRAM-type internal latches, using configuration bits between 43 and 157 Mb, depending upon model. Configuration storage is volatile and must be reloaded whenever the FPGA is powered up. Bit-serial configurations can be either master serial mode where the FPGA generates the configuration clock (CCLK) signal or slave serial mode where the external configuration data source also clocks the FPGA. As an option, an FPGA’s bit stream can be AES encrypted to prevent unauthorized copying. The FPGA performs decryption using an internally stored 256-b key that can use battery backup or alternative nonvolatile storage. Each Virtex-6Q has as many as nine clock management tiles (CMTs), each consisting of two mixed-mode clock managers (MMCMs) based on phase-locked loops (PLLs). The PLL can function as a frequency synthesizer and as a jitter filter for incoming clock signals. The MMCM features a voltage-controlled oscillator (VCO) covering 600 to 1440 MHz, with three sets of programmable frequency dividers. The VCO has eight equally spaced output phases, which can be selected to drive one of the seven output dividers. The MMCM can also provide fixed or dynamic phase shifts, depending on the VCO frequency. At 600 MHz, the phase-shift timing increment is 30 ps. The Virtex-6Q FPGAs include gigabit transceiver (GTX) circuits with speeds between 12 and 36 Gb/s. Each GTX transceiver is a combined transmitter and receiver capable of operating at a data rate between 480 Mb/s and 6.6 Gb/s. Lower data rates can be achieved using FPGA logic-based oversampling. The GTX transmitter and receiver are independent circuits that use separate PLLs to multiply the reference frequency input by certain programmable numbers between 4 and 25, to become the bit-serial data clock. The secure intellectual property (IP) core architecture of these devices has been reviewed by the National Security Agency (NSA) to ensure that they include effective anti-tamper (AT) features and can defeat counterfeiting efforts. The FPGAs are intended to complement AT system applications overall, ensuring protection of critical technology per Department of Defense (DoD) directive DoD 5200.39. “The Virtex-6Q family is yet another trailblazing step in the long history of Xilinx supporting the Aerospace and Defense industry,” says Yousef Khalilollahi, Senior Director, Aerospace and Defense at Xilinx. “This product meets the stringent design requirements of secure defense products for protection against sophisticated adversaries.” To combat counterfeiting, the FPGAs include a simple visual identification and confirmation of the products’ authenticity based on the external Virtex-6Q FPGA package marking, as well as other built-in, multi-level Xilinx proprietary features assuring product verification. The devices are fabricated with the firm’s low-power 40-nm dual-oxide silicon process technology and are available in both industrial (I) temperature grade (−40 to +100°C) and military temperature grade (−55 to +125°C). They are ideal for a variety of mission-critical systems, including surveillance, reconnaissance, and electronic warfare (EW). More information on individual FPGA models is available on the Xilinx website. Xilinx, Inc.
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