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Digital receiver board with high-speed A/D and on-board FPGA is a software-defined radio subsystem Oct 11, 2006 12:04 PM
Pentek Inc. has released its model 6821-422, the newest member of its GateFlow installed-core products. Based on its model 6821 215 MHz A/D Converter VME with dual Virtex-II Pro FPGAs, it includes a factory-installed wideband digital downconverter (DDC) IP core. This DDC is an optimized dual-channel version of Pentek's GateFlow IP Core 422 that has been precisely tailored to complement the various resources on the board. The result is a complete, preconfigured digital software radio subsystem that enables an RF input to be fed into a front-panel analog connector and delivers real or complex digital samples at the output translated to baseband from any frequency slice of the input signal. Applications particularly well suited for the model 6821-422 include wideband recording and systems, real-time DSP and software radio systems — as well as data-acquisition applications for wideband communication signals used in telemetry and SATCOM. Radar-pulse and beamforming applications especially benefit from the board's many gate, trigger and multichannel synchronization modes. By using a unique polyphase implementation, the FPGA IP core 422 leapfrogs the commonly used TI/Graychip GC1012B ASIC in speed, dynamic range and programmability. The core operates at frequencies up to 296 MHz, whereas most ASIC downconverters top out near 150 MHz. The digital output signals are delivered by the model 6821-422 to two or four front-panel data port connectors using several data-packing modes. In addition, the signals can be delivered in a low-voltage differential signaling (LVDS) format through either a VMEbus P2 connector or a second-slot, front-panel mezzanine.
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