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World's first polymorphic computer is here
Mar 28, 2007 11:49 AM 

The world's first computer that can modify its architecture to adopt to different forms, depending on the current application has been developed by Raytheon. Named MONARCH (Morphable Networked Micro-Architecture), and developed to address the large data volume of sensor systems as well as their signal and data-processing throughput requirements, it is said to be the most adaptable processor ever built for the Department of Defense. It performs as a single system on a chip, resulting in a significant reduction of the number of processors required for computing systems and performing as an array of chips for teraflop throughput.

"Typically, a chip is optimally designed either for front-end signal processing or back-end control and data processing," explained Nick Uros, vice president for the Advanced Concepts and Technology group of Raytheon Space and Airborne Systems.

"The MONARCH micro-architecture is unique in its ability to reconfigure itself to optimize processing on the fly. MONARCH provides exceptional compute capacity and highly flexible, data-bandwidth capability with beyond state-of-the-art power efficiency — and it is fully programmable."

In addition to the ability to adapt its architecture for a particular objective, the MONARCH computer is also believed to be the most power-efficient processor available. In laboratory testing MONARCH outperformed the Intel quad-core Xeon chip by a factor of 10. MONARCH's polymorphic capability and super efficiency enable the development of DoD systems that need very small size, low-power, and in some cases, radiation tolerance for such purposes as global positioning systems, airborne and space radar and video-processing systems.

Raytheon has begun tests on prototypes of the polymorphic MONARCH processors to verify they will function as designed and to establish their maximum throughput and power efficiency. MONARCH, containing six microprocessors and a highly interconnected reconfigurable computing array, provides 64 gigaflops (floating point operations per second) with more than 60 gigabytes per second of memory bandwidth and more than 43 gigabytes per second of off-chip data bandwidth.


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