Contrary to popular belief, superconductors have not vanished. In fact, they are alive, well, and flourishing in the Digital-RF™ niobium-based integrated-circuit (ICs) designs being developed by Hypres (www.hypres.com) for broadband applications. These high-speed, high-frequency circuits are ideal for receivers, transmitters, and transceivers that must handle broad instantaneous frequency ranges and wide dynamic ranges from RF through millimeter-wave frequencies, in applications including satellite-communications (satcom), electronic-warfare (EW), signal-intelligence (SIGINT), and radar systems.

Digital-RF receivers take advantage of the processing speeds possible with high-temperature-superconductor (HTS) versions of analog-to-digital converters (ADCs). These ADCs are based on Josephson Junctions (JJs) as the switching elements, rather than transistors in conventional room-temperature ICs. The JJs rely on the properties of niobium (Nb) conducting metals, which are resistive at room temperature and essentially lossless below a critical (cryogenic) temperature. For a JJ, faster operating speed is possible when the device can achieve higher current densities. Hypres operates a commercial superconductor foundry that produces ICs having JJs with current densities as high as 4.5 kA/cm2.

The ICs are actually built upon standard silicon wafers, using 6-in. (150-mm) diameter wafers as the base. The JJs are formed by sandwiching Nb layers around a silicon-dioxide (SiO2) insulator layer. A typical superconducting IC includes resistors, inductors, and interconnects, with JJs taking the place of the transistors of a conventional IC. A typical 6-in. Hypres wafer yields more than 500 chips, with as many as 2000 JJs per chip.

A Digital-RF receiver is built around one or more of the Hypres ADC chips, including single-chip bandpass ADCs with input center frequency that can be set from 800 MHz to 21 GHz (see figure). These data converters are designed for straightforward interface to Virtex 4/5/6 field-programmable gate arrays (FPGAs) from Xilinx (www.xilinx.com). A Digital-RF receiver is actually a complete system, with the ADC chip module, a commercial cryocooler from Sumitomo (www.shicryogenics.com) to maintain the ADC module at the required cryogenic temperature, a current source, interface amplifiers (typically 17-channel units), and an FPGA interface board.

In addition to the 4K cooled ADC module, these cryogenic receivers can optionally include a 70K integrated temperature-controlled stage with an analog HTS filter to screen incoming signals. The Digital-RF receivers provide spurious-free dynamic range (SFDR) in excess of 100 dB, and better than 140 dB for narrowband signals. They can handle a large number of channels, depending upon the receiver architecture and number of ADCs (see figure), with signal processing, such as in-phase (I) and quadrature (Q) signal-component filtering and downconversion performed in the digital realm. Additional baseband signal processing, such as channelization, demodulation, decoding, and dispreading, is also performed digitally. Obviously, the technology is as suitable for commercial cellular communications systems based on digital modulation techniques as it is for military EW, SIGINT, and radar systems.

Digital-RF receivers are not small, but designed for fixed installations. A typical Digital-RF receiver fits within 50 in. of a standard 19-in. rack. It weighs about 400 lbs. and draws 1.5 kW from a 110-V AC supply. Options include a personal computer (PC) with touchscreen monitor and preloaded graphical user interface (GUI), vacuum pump, external clock source (at 20, 40, or 50 GHz), and integrated monitor amplifier unit with four-channel digital oscilloscope.

Hypres, Inc.
175 Clearbrook Rd.
Elmsford, NY 10523
(914) 592-1190, FAX: (914) 347-2239
e-mail: sales@hypres.com
www.hypres.com