AccelChip Inc. has extended its AccelWare Intellectual Property (IP) libraries to include key building blocks for signal processing and communication applications. This new IP enables the acceleration of algorithms running on standard DSP and embedded processors by an order of magnitude or better.

AccelWare is parametric IP that provides a direct path to hardware implementation of complex MATLAB toolbox and built-in functions. The new AccelWare blocks extend the range of the existing AccelChip DSP synthesis toolset into various real-time, continuous communications and array signal-processing systems, including space-time adaptive processing, wireless signal processing, software-defined radio (SDR), global positioning, radar, and sonar. Acceleration of both standard and embedded DSP processors is becoming a key requirement of these next-generation systems, and AccelChip is working with semiconductor vendors to enhance these types of communications designs.

"Wireless communication continues to be the dominant application for traditional DSP design," said Will Strauss, president of Forward Concepts, the market research organization tracking DSP trends. "To achieve system requirements, future high-performance communications systems are going to be a combination of software running on programmable or embedded DSP processors plus dedicated hardware to accelerate key aspects of the algorithms in the system."

The combination of AccelWare IP with AccelChip DSP Synthesis provides a high level of reuse and portability, allowing designers to migrate existing designs faster. AccelChip's toolset and IP can also be used to design entire DSP systems or to develop DSP accelerators. A DSP accelerator is a high-speed FPGA or ASIC that interfaces with a DSP processor bus. It is designed to accelerate portions of the overall algorithm to achieve a high-performance system.

The additions to the AccelWare IP include parameterized models for a Viterbi decoder, Galois field operators, polyphase decimation filters with programmable coefficients, radix-4 FFTs and IFFTs, and FIR filter serial-distributed arithmetic (SDA) and parallel-distributed arithmetic (PDA) architectures. AccelWare IP libraries are available immediately.

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