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Partnership plans to cut SDR development time and cost May 5, 2005 3:13 PM
Spectrum Signal Processing Inc. and Zeligsoft Inc. have entered into an agreement whereby Spectrum will bundle Zeligsoft's Component Enabler, Zeligsoft CE, with its fully programmable flexComm SDR-3000 software-defined radio (SDR) platform. Zeligsoft CE is an advanced software-modeling tool that enables the design, deployment and configuration of component-based software systems supporting the Software Communications Architecture (SCA) standard. According to Spectrum Signal Processing, Zeligsoft CE facilitates the users' understanding of the SCA architecture and allows designers to easily manage increased software complexity. The tool automatically validates the design, generates design documentation and generates the complete set of Extensible Markup Language (XML) descriptor files specific to the waveform, eliminating the process of manually authoring the XML files. "Zeligsoft is delighted to team with Spectrum to provide a tool that is tightly coupled with Spectrum's SDR-3000 platform. Customers are always asking for closer relationships among vendors in the SDR value chain, and today's announcement is evidence that both companies are listening," said Kamal Krishnapillai, vice president, sales and marketing, at Zeligsoft. "Spectrum is an ideal channel partner for our Zeligsoft CE development tool because of their leadership in SDR technologies and our complementary fit with their existing hardware and software product offerings." Spectrum's product bundle includes a Universal Modeling Language (UML) 2.0-compliant model of the SDR-3000 platform developed with Zeligsoft CE. This allows customers to visualize the SDR-3000 platform configuration and take advantage of all available resources to expedite the development and deployment of their applications. The SCA is an open architecture framework that governs how elements of hardware and software are to operate in harmony within the U.S. Department of Defense Joint Tactical Radio Systems. The goal of this architecture is to enable the development of interoperable and portable waveforms.
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