RF Design Magazine


Single-chip CMOS transceiver for 3.5G handsets
Jan 25, 2006 4:37 PM 

Sirific Wireless, a developer of single-chip CMOS RF transceivers for multimode wireless applications, has introduced a single-chip CMOS HSDPA/WEDGE RF transceiver, the SW3200. This is the first product in Sirific’s NEXUS III family of CMOS 3.5G RF transceivers.

The device supports transmit and receive operation in five WCDMA bands (I, II, III, IV and V), as well as all four EDGE, GPRS, and GSM bands. With HSDPA Category 9 capability, the SW3200 enables downlink data rates up to 10.2 Mbps. It also incorporates a patented sigma-delta fractional-N synthesizer design that requires no external loop filter components. The device also features an on-chip 26-MHz digitally controlled crystal oscillator (DCXO). To accommodate a variety of WEDGE baseband configurations, the device features a flexible baseband interface. This RF transceiver supports next-generation baseband processors with a 2.5G DigRF-compliant digital baseband interface, which incorporates all GSM/EDGE analog baseband processor functions. The SW3200 also provides an analog interface for legacy WEDGE baseband processors.

Sirific Wireless applies a linear direct upconversion architecture in the SW3200’s multiband transmitter design. This low-noise linear transmitter requires no external filtering for GSM/EDGE transmission and directly interfaces to standard linear power amplifiers. The SW3200’s direct downconversion receiver supports concurrent WCDMA and GSM/EDGE operation, as well as compressed mode receive operation for smooth handoff between WCDMA and GSM/EDGE networks.

Implemented on 130-nm CMOS technology, the SW3200 creates a complete radio solution when coupled with a multiband radio front-end capable of supporting quad-band GSM/EDGE and tri-band HSDPA/WCDMA. The transceiver is sampling now in a 7 mm x 7 mm x 1 mm land grid array (LGA) package. Pricing begins at $7.95 in 10K unit quantities.



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