Model STC5230 is a single-chip timing solution for SDH, SONET, and Synchronous Ethernet networks. Fully compliant with ITU-G.813 and Telcordia GR1244 and GR253, it accepts 12 reference inputs and generates 9 independent synchronized output clock signals. It automatically detects reference input signals, although reference selection can be manual or automatic. The timing source contains two independent timing generators, each with a digital phase-lock loop (DPLL). The loop bandwidth of each can be programmed from 90 mHz to 107 Hz. Both timing generators support master/slave operation for redundant applications. The STC5230, which operates with an external oven-controlled crystal oscillator (OCXO) or temperature-compensated crystal oscillator (TCXO) at 20 MHz, uses a standard SPI serial bus interface. The STC5230 is capable of field upgrade with optional external EEPROM or via the bus interface. The timing source is available in a TQ100 package.

The Connor-Winfield Corp. (www.conwin.com)

RSS    Save to Del.icio.us  Digg This