Cambridge, U.K. -- ARM Ltd. announced the availability of what the company is calling the first transaction-level SystemC models of ARM cores targeted for system-level verification.

According to ARM, the ARM1136J-S SystemC processor models and the ARM1136JF-S SystemC processor models leverage a joint donation to the Open SystemC Initiative (OSCI) by ARM, Cadence Design Systems Inc., and STMicroelectronics Group, which the companies say will accelerate the development of an industry standard.

The new models use STMicroelectronics knowledge in system modeling design and Cadence Design's validation platform. The models also use an application programming interface (API) developed in collaboration with STMicroelectronics and Cadence Design Systems that is optimized for early hardware-software verification of complex embedded systems, ARM says.

The new models will be available from ARM in the fourth quarter of 2003, as part of the company's RealView model library.

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