RF Design Magazine


Single-chip phone simplifies GSM/GPRS handset design
Oct 27, 2005 1:04 PM  By Ashok Bindra, Editorial Director

Combining advances in 0.13-micron CMOS process with innovations in digitally intensive RF transceiver architecture and rigorous verification methodologies, Silicon Laboratories Inc. has readied a highly integrated single-chip solution for the cost-sensitive GSM/GPRS handsets. As a result, its AeroFONE Si4905 provides a fully functional single-chip phone that integrates on-chip a power management unit (PMU), battery interface and charging circuitry, digital baseband, analog baseband and a quad-band RF transceiver. Plus, it has an integrated digitally controlled crystal oscillator (DCXO), which eliminates the expensive external VC-TCXO modules used in competing solutions. The Si4905 also integrates 2 Mbits of on-chip SRAM, which enables handset manufacturers to build GSM voice-centric cell phones without the need for external SRAM. The AeroFONE single-chip phone also integrates an ARM9 family-based MCU and a DSP core. By comparison, according to Silicon Laboratories, the Si4905 single-chip phone reduces component count by 75%, board area by 65% and manufacturing costs by 50%. This single chip phone is aimed at entry-level GSM/GPRS handsets where cost and circuit board area are critical.

The Si4905 offers a flexible, scalable and easy-to-use platform for entry-level GSM/GPRS handsets without requiring additional coprocessors or large software investments, said Silicon Laboratories. Its underlying system architecture is adaptable to multiple software protocol stacks, operating systems and applications frameworks. By enabling handset developers to either reuse existing software infrastructure or select one of the multiple protocol stacks and application software frameworks validated by Silicon Laboratories and its partners, including TTPCom, Stackcom and CCww, this novel solution approach is architected to lower software-switching costs. The AeroFONE software suite also includes smart platform and system driver libraries, which greatly reduce software development costs while improving time-to-market, performance and quality.

To minimize leakage, the chip uses circuit techniques. The new chip’s E-GSM sensitivity offers >2 dB improvement over existing solutions, while DCS band delivers over 1 dB higher performance than others in the market, claims Silicon Laboratories. The Si4905 is available in a standard 12 mm x 12 mm, lead-free, RoHS-compliant plastic BGA package. Pricing is dependant on volume. However, the manufacturer is still characterizing the part for power performance. The Si4905 is sampling now, with mass production scheduled for Q2 2006. An evaluation platform is available for $5000.



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