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A second-generation monolithic wireless microcontroller family, designed for IEEE802.15.4 and ZigBee applications, has been released by Jennic. Like the previous generation, each microcontroller chip in the JN513x family integrates a 32-bit RISC processor core with a fully compliant 2.4 GHz IEEE802.15.4 transceiver, 192 kB of ROM, a selection of RAM sizes from 8 kB to 96 kB, and a mixture of analog and digital peripherals. The controller is optimized to offer incremental improvements in cost and performance. Plus, it breaks the price barrier of $3, according to Jennic. In addition, the supplier has readied modules, evaluation kits, software and protocol stacks.

Performance improvements include extended range, better receive sensitivity, greater tolerance to carrier offset and EVM, higher transmit power, low power consumption, extra security features with an on-chip MAC address for each device, power saving and sleep modes, full industrial temperature range and wide supply voltage. Besides a unique MAC address identifier, it also offers 128-bit AES security.

In addition, the memory has been increased to 192 kB ROM and 96 kB RAM, allowing full exploitation of the on-chip 32-bit RISC processor for complex applications and algorithms coupled with ZigBee or other mesh protocol stacks. Variants are available with 32 kB, 16 kB or 8 kB RAM for simpler, low-cost applications.

The company attributes extended range to a new modem architecture that provides -97 dB receive sensitivity and a robust performance in noisier environments with greater tolerance to carrier offset and EVM. Meanwhile, the transmit power has been improved to +3 dbm. While the link budget is given at 100 dB for the transceiver, specified over the full industrial temperature range (-40 °C to +85 °C) and wide supply voltage.

In addition, the power consumption has been cut to 39 mA for Rx current and Tx current, respectively. And deep sleep current consumption is 400 nA, allowing products waiting for a user-event to consume virtually no power. For an active part of a wireless sensor network, with on-chip oscillator and protocol timers running, sleep current consumption is less than 2 A. These sleep power consumption figures, in conjunction with the tight coupling of radio, protocol hardware and software on a single-chip wireless microcontroller set an industry benchmark for wireless sensor applications requiring extremely long battery life, stated Jim Lindop, Jennic's CEO.

Other features include integrated power management and sleep oscillator for low power, on-chip power regulation for 2.2 V to 3.6 V battery operation, sleep current with active beacon and minimum external components. In addition, it includes 4-input 12-bit analog-to-digital converter (ADC), two 11-bit digital-to-analog converters (DACs), two comparators, two application timer/counters, three system timers, two UARTs (one for debug), SPI port with five selects, two-wire serial interface, up to 21 GPIOs, and industrial temperature range.

The JN513x family offers flexibility with four pin-compatible devices — JN5131, JN5132, JN5133 and JN5139. They feature RAM sizes of 8 kB, 16 kB, 32 kB and 96 kB respectively. Pin compatibility allows hardware system design to be carried out in advance of understanding software requirements, once these are understood, then the device that offers the optimum RAM footprint may be used to manufacture the lowest-cost solution. Devices are packaged in an 8 × 8 mm 56-lead RoHS compliant and lead-free QFN that is JN5121 pin-compatible. In 100k quantities, the JN5139 with 192 kB ROM and 96 kB RAM is priced at $3.50, and JN5131 with 8 kB RAM costs $2.95.

Evaluation kits are available that provide a controller and four sensor units with a range of plug-in modules, offering power and antenna options. The company also offers an IDE that includes a new C compiler.
Jennic Ltd.
+44 (0) 114 281 2655
www.jennic.com

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