USB physical interface PCB design guidelines

With respect to printed circuit board design, first place the USB controller chip, USB receptacle and other major components on the unrouted board. Then route high-speed USB traces as close, short and straight as possible on the same layer whenever possible. The followings are the guidelines of the USB physical interface PCB design.

· The trace width and the space between two traces should be constant.
Maintain parallelism between DM and DP. As shown in Figure 7, the maximum trace-length mismatch between DM and DP is 150 mils. The minimum suggested spacing to clock signals is 50 mils and the minimum spacing to other signal traces is 20 mils. 7.5 mil traces with 7.5 mil spacing results in approximately 90 ohms differential trace impedance.

· USB signals (D+, D-) traces should avoid crossing power or ground splits and therefore must be on a continuous power system plane underneath the pair of traces (see Figure 8).

· Termination resistors and pull-up resistors should be placed close to USB signals to avoid stubs (see Figure 9).

· Place D+/D- in one layer. An arc turn is better than two 45° turns, and two 45° turns are better than a single 90° turn (see Figure 10).

USB compliance testing

Most of the USB chips on the market today have already been certified for the USB-IF’s USB logos. But, if you design a new PCB board or your PCB board is modified, you will need to redo USB electrical tests. Four tests are required to pass USB electrical tests to get the logo of your product.

· High-speed signal quality
The signal quality is affected not only by the USB chips, but also by the ESD, the resistor and capacitor on D+ and D- lines, and the PCB layout of your product. All high-speed capable devices are required to perform this test.

· Full-speed signal quality
All full-speed and high-speed capable devices are required to perform this test.

· Time Domain Reflectometry (TDR)
TDR is a way to evaluate impedance values and variations along a transmission line such as board, cables, connectors or a microstrip.

· In-rush current
Limiting in-rush current requires controlling the on-board capacitance between VBUS and ground and minimizing contact arcing, thereby prolonging connector contact life. To help minimize the in-rush current, reduce the on-board capacitance between the VBUS and GND of the USB device and increase the VBUS serial resistance.

Conclusion

ABOUT THE AUTHOR

Guo Yang Bin is a Senior Engineer in product line USB/WUSB of NXP Semiconductors.

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