Several types of circuits and architectures have been proposed for EDGE transmitters. The most common are the following:

• direct-launch conversion transmitter;
• small-signal polar modulation (polar lite);
• large-signal open loop polar modulation; and
• large-signal closed polar loop (polar loop).

Direct-conversion architecture (Figure 2) is used in many transmitter designs for different standards and modulation formats. The amount of circuit blocks is minimal. For several applications, this is the architecture that offers the best compromise of performance vs. power consumption and circuit complexity.

However, this is not necessarily the case for GSM and EDGE applications, since the GSM standard imposes stringent requirements on the noise emitted by the transmitter outside the transmit band. These requirements translate to a total required noise floor of less than 162 dBc/Hz. The direct-conversion transmitter, therefore, often needs additional filtering after the PA. This architecture also requires a PA with good linearity, which compromises the potential for high-power efficiency. Also, the requirement of the GSM standard for a 30 dB range of output power levels and an additional range for burst ramping complicates this transmitter approach, since the power level control needs to be applied before the signal reaches the PA. In summary, the simple circuit design achieved by DCT is complicated by the output power control scheme while the overall system efficiency suffers due to use of a linear PA.

A different class of transmitters divides the signal into its amplitude and phase components. These are generally designated polar modulation transmitters, or simply polar transmitters.

Polar modulation architecture (Figure 3) is attractive for GSM and EDGE applications because it is relatively easy to combine with the traditional phase-only architecture used for GMSK. In principle, all that is needed is an additional mixer to apply the amplitude modulation. However, the AM and PM components are recombined in the phase-frequency detector (PFD) to obtain the full modulation before the signal reaches the PA, so the complexity of output power control scheme as well as lower PA efficiency that are associated with DCT also apply to this implementation of polar transmitters.

In an effort to overcome the efficiency limitations and issues with output power level control, this architecture applies AM directly to the PA by controlling the bias current, the collector voltage, or a combination of both to the PA using an analog voltage control input. However, due to the stringent requirements for modulation accuracy and spectral purity, as well as output power range and accuracy, this architecture (Figure 4) faces several serious design challenges.

First, there are significant requirements to the linearity and range of the PA power control input. Even with a highly linear control range, it is almost certainly required to have some predistortion of the AM signal to have sufficiently accurate control of the amplitude variations over the full range of output levels. It is also necessary to take into account the AM to PM characteristics of the PA by either applying predistortion to the phase modulation or using a phase-correcting feedback loop.

The applied predistortions for both amplitude and phase need to take into account any variations over temperature, supply voltage and output power. Substantial characterization and individual calibration of each transmitter is often required. With this approach, the issues of accurate predistortion and power control are often the most severe at the lowest output power levels, where accurate calibration is the most difficult and non-linearities are significant. Hence, the trade-off between the amount of calibration and performance often gives unsatisfying results.

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