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In an ideal configuration, the RF signal would be directly converted to digital, without the necessity of analog conversion to a lower IF or baseband signal before digital processing. The barrier, however, is that conventional analog-to-digital/digital-to-analog converters (ADCs/DACs) and digital circuits are just not fast, precise or efficient enough to accomplish this feat. This is where superconducting microelectronic technology can step in.

Superconducting microelectronics exhibit characteristics that are uniquely suitable for the implementation of ADCs, and ultimately, true digital RF processing^[1-3]. The technology simultaneously includes high switching speed, low power, natural quantization, quantum accuracy, high sensitivity, and low noise^[1-3]. ADCs/DACs built on the principles of superconducting microelectronics have already demonstrated superior performance in the laboratory^[4-5], and are being developed into high-speed instrumentation and communication systems.

Superconductor ADCs/DACs incorporate ultrasensitive superconducting quantum interference device (SQUIDS) and Josephson junction-based logic. Unlike conventional semiconductor circuits, the properties of superconductor circuits are related to the dynamics of magnetic flux in these circuits^[16-18]. The two fundamental principles of superconductor circuits are: conservation of flux in a superconducting loop; and quantization of flux in a superconducting loop in integral multiples of the flux quantum, which is a fundamental value defined by Planck's constant “h” and electron charge “e,” specifically h/2e.

Together, these naturally occurring quantum phenomena set the current circulating around a closed superconducting loop with Josephson junctions to be fundamentally periodic in the analog magnetic flux applied to it^[23]. The threshold spacing of a superconductive loop is determined with the accuracy of fundamental constants^[23]. This natural relationship of analog and digital forms makes superconductor technology especially suitable for ADC/DAC implementation^[23].

Superconductor ADCs/DACs, with extremely high sampling frequencies (tens to hundreds of gigahertz), require digital circuits capable of operating at similarly high data rates^[23]. The use of the same very narrow SFQ pulses forms the basis of rapid SFQ (RSFQ) logic, arguably the fastest digital technology^[12-13], enabling integration of ultrafast RSFQ digital circuits with superconductor ADCs/DACs.

Originally developed in the mid-1980s^[14-16], RSFQ logic provides the foundation for virtually all of the fastest superconductor digital circuits being developed worldwide^[16-17]. Simple circuits have been demonstrated with speeds in excess of 750 GHz^[18], and complex medium-scale integrated circuits (ICs) 30 GHz^[17-19], with performance up to 200 GHz projected in the not-too-distant future^[20]. This is much faster than projected performance of competing technologies^[21] and motivates much of the recent developments in the field of superconductor digital electronics^[23].

This direct conversion between analog RF and digital baseband signals can replace frequency and protocol-specific analog hardware with flexible, software-programmable digital processors. On the receive side, high sampling-speed (>20 Giga samples/s) and linearity (>100 dB spur-free dynamic range) of superconductor ADCs, digital down-converters and ultrafast (20 GHz) digital filters have already been demonstrated. This will enable broadband digitization of the incoming RF waveform directly, leading to true digital channelization. In addition, the lower receiver noise temperature enhances information capacity, even in interference-limited systems.

Similarly, on the transmit side, a quantum-linear DAC preceded by digital upconverters and digital filters provide the scheme for direct synthesis of a spectrally pure RF transmit waveform. Furthermore, the power of digital processing at RF allows direct digital pre-distortion of the transmit waveform for linearization of the power amplifier chain.

Superconducting circuits require operation at cryogenic temperatures, typically at 4 K to 5 K. This might seem to present a serious impediment to practical application of these circuits to wireless systems, as temperatures on this scale have traditionally been available only in laboratory environments using liquid helium. However, commercial cryocoolers (essentially low-temperature refrigerators) have recently become available that can maintain the needed cryogenic temperatures indefinitely, with only electric power and an air-cooled compressor. Similar cryocoolers, fielded in commercial base stations for cooling superconducting passive filters, have proven to be extremely reliable (with a projected MTBF in excess of 90 years^[6]).

In fact, some suppliers have recently demonstrated the superior performance of superconducting ICs in cryocooled systems^[7,8]. Further improvements in size, price and power of these cryocoolers will occur with the increased market for superconducting ICs in communications and other industries. While the cryogenic nature of these systems will be virtually invisible to the end-user, the low temperature makes a significant contribution in reducing the overall receiver noise temperature.

As previously stated, superconducting microelectronics exhibit unparalleled speed, accuracy and sensitivity. This unique combination of features can be harnessed to realize future wireless technologies — such as software-defined radio (SDR), cognitive radio (CR) and ultrawideband (UWB) — where the whole frequency band-of-interest is digitized at RF with sufficient dynamic range and all subsequent signal processing is performed in the digital domain.

Following digitization of the RF signal with a fast sampling clock (20 GHz to 40 GHz at present, with the potential of well over 100 GHz with modest improvement in chip fabrication), the same ultrafast RSFQ digital electronics processes the ADC output, performing digital downconversion and filtering. The major benefit of this architecture is the elimination of frequency- and protocol-specific, non-linear analog RF components. Superconducting digital-RF technology brings the fidelity and flexibility of digital processing to the RF domain, enabling the receiver to be reconfigured in software.

On the transmit side also, the waveform is processed completely in the digital domain up to RF before converting to analog with an ultralinear RF DAC^[3]. Unlike the receiver, the transmitter must include a high-power amplifier (HPA). High-power amplifiers for RF transmitters inevitably exhibit significant non-linearities, particularly when they are operated near their maximum output powers. This causes mixing of output components, leading to intermodulation distortion (IMD).

One can operate the HPA far below its saturation level, where it is more linear, but this is expensive, always energy inefficient and may be impractical for some applications. Alternatively, if the output distortion of the amplifier is known, the input can be deliberately predistorted in a way that will cancel out the distortion in the output, linearizing the HPA. The two leading methods for HPA linearization are analog feedforward distortion compensation and digital predistortion^[13,14]. Baseband predistorters rely on complicated digital signal processing algorithms working on the demodulated low-frequency baseband digital waveform — not the RF waveform — in an attempt to compensate for the amplifiers non-linear gain and phase characteristics. These indirect methods involve either mapping an input in-phase and quadrature signal vector into an output signal vector or multiplying the signal with a level-dependent complex gain. These schemes require sophisticated, extensive DSP and the improvements have been gradual over the last two decades.

However, the circuit complexity is not the only drawback of such baseband digital predistortion schemes. The feedback delay involved in demodulating the HPA output back to baseband and then digitizing it to compare with the digital baseband data is too long (on the microsecond scale). This limits the effectiveness of the linearizer. On the other hand, analog feed-forward schemes perform distortion compensation directly on the RF waveform and do achieve better suppression of IMD. This scheme requires an additional active distortion cancellation loop, with a very linear second HPA and precise amplitude and phase matching of analog components. The analog feed-forward amplifiers are expensive to manufacture and have poor dc-to-RF efficiency compared to those using digital predistortion.

Unlike baseband or intermediate frequency (IF) predistorters shown in Figure 1(a), which are limited to narrowband correction of slowly varying non-linearities, an RF predistorter can correct instantaneous, signal-dependent fluctuations of the HPA transfer function on a subnanosecond time scale. Only superconducting electronics are fast enough to perform RF predistortion in the digital domain (Figure 1b).

High oversampling ratios, possible with this technology, allow for corrections of higher-order harmonics of the RF waveforms, which is impossible in any other scheme. Therefore, unlike feed-forward schemes, the digital-RF predistorter can correct for strong non-linearities (which leak out a significant fraction of the power into third, fifth and higher harmonics), enabling the use of more power-efficient amplifiers (e.g. class AB). In other words, the digital-RF predistorters combine the advantages of digital predistortion — high efficiency, low cost and high reliability — with those of analog feed-forward amplifiers — high degree of linearity and faster tracking of dynamic effects.

The combination of the ultralinear RF DAC and the digital-RF predistorter enables spectrally pure wideband transmit waveforms. Beyond the benefits of increased bandwidth and efficiency improvements, ultralinear power amplifiers are becoming increasingly more important for military and commercial wireless systems. Wideband systems, particularly multichannel systems, will greatly benefit from the significantly reduced spurious signals, generated by the power amplifiers, which cause serious system-degrading interference. Also, the FCC has heightened interest in similar performance due to the developing spectrum utilization issues caused by increased wireless communication demand^[15].

The RF band in a practical wireless communication system includes a large number of signals and several signal sub-bands. The greatest advantage of the digital RF approach is obtained if the entire band is digitized, with band separation and decoding carried out in parallel in the digital domain. Of course, this requires a wideband bandpass ADC with extremely high dynamic range and low noise, combined with digital processing at multi-GHz rates. This is achievable using RSFQ superconducting electronics, and can lead to the development of a digital channelizer system, as shown in Figure 2. In a digital channelizer system, the bandpass ADC modulator is followed by a bank of identical modular digital channelizer units. Each of these modules consists of a digital mixer (multiplier) with a programmable digital local oscillator for selecting band-location and a programmable digital filter for selecting bandwidth.

These channelizer modules can be further generalized into correlation-based receivers. In a correlation-based receiver, the ADC modulator output is multiplied with a reference digital template, which may be much more complex than a periodic digital stream corresponding to a local oscillator. By synthesizing these digital templates, one can combine multiple functions, such as downconversion, demodulation, despreading, and dehopping, in one device. While digital cross-correlation is commonly used for direct spread CDMA, the ultrafast superconducting electronics enables use of cross-correlation techniques directly on the sampled RF waveform, resulting in a digital RF matched filter.

A block diagram of the digital RF transceiver is shown in Figure 3. In the receiver, the RF signal from the antenna is filtered and (possibly) amplified, but is then sent directly to a bandpass ADC, without first downconverting using an analog mixer and local oscillator. The downconversion is carried out completely in the digital domain, in a way that can be easily reprogrammed. A digital decimation filter is used to decrease the output bandwidth, while increasing the effective number of bits. This is likely to be a quadrature receiver, but the quadrature channel is left out of the figure for simplicity. There may also be channelization into multiple baseband channels, as described below. Finally, with only slight modifications, the receiver can be reconfigured as a correlation-based receiver, using a digitally generated template and an appropriately matched digital filter.

The transmitter carries out the same digital functions in reverse, with a fast DAC reconstructing the RF signal directly, just before the high-power amplifier (HPA). The diagram also shows a dynamic digital equalizer, a predistortion module that is combined with the DAC to compensate for non-linearities in the HPA. In principle, this predistortion module can be dynamically adjusted to account for memory and other effects in the HPA. Also, multiple channels can be combined digitally into one broadband digital RF signal before amplification, so only a single HPA is necessary.

All fast digital and data conversion processes shown in Figure 1 will be carried out using RSFQ low-temperature superconductor (LTS) circuits cooled to deep cryogenic temperatures ~ 4 K. The figure also suggests that analog filtering and amplification can be carried out at an intermediate cryogenic temperature (~ 60 K) in order to minimize thermal noise. This is compatible with commercial cryocoolers, which incorporate two or more temperature stages in their design.

The ultimate performance of new wireless communications systems requires digital processing and data conversion at multi-GHz rates. The only technology that can achieve this is superconducting digital RF electronics. Using this technology, an entire RF band can be received and transmitted using the same RF antenna and amplifier. Processing of the individual channels can be carried out in parallel in the digital domain. Furthermore, since the superconducting receiver is so sensitive, major improvements can be obtained in range, number of users, data rate and/or battery life. Finally, digital linearization techniques can be used to improve the efficiency and performance of high-power amplifiers in the transmitter.

1. D.K. Brock, E.K. Track, and J.M. Rowell, “Superconductor ICs: The 100 GHz Second Generation,” IEEE Spectrum, December 2000, p. 40.

2. D.K. Brock, O.A. Mukhanov, and J. Rosa, “Superconductor Digital RF Development for Software Radio,” IEEE Communications magazine, February 2001, p. 174.

3. D.K. Brock, “Superconductor Microelectronics: A Digital RF Technology for Software Radios,” Chapter 5 in Software-Defined Radio: Enabling Technologies, ed. W. Tuttlebee, Wiley, England, 2002.

4. K.K. Likharev and V.K. Semenov, “RSFQ Logic/Memory Family: A New Josephson-Junction Digital Technology for Sub-Terahertz Clock-Frequency Digital Systems,” IEEE Trans. on Applied Superconductivity, vol. 1, pp. 3-28, 1991.

5. W. Chen, A.V. Rylyakov, V. Patel, J.E. Lukens, and K.K. Likharev, Rapid Single Flux Quantum T-flip-flop Operating at 770 GHz,” IEEE Trans. on Applied Superconductivity, vol. 9, pp. 3212-3215, 1999.

6. M. Hanes and A. O'baid, “Performance and Reliability Data for Production-Free Piston Stirling Cryocooler,” presented at the 12^th International Cryocooler Conference, Cambridge, MA, June 18-20, 2002; M. Hanes, “Performance and Reliability Improvements in a Low-Cost Stirling Cycle Cryocooler,” Cryocoolers 11, ed. R. G. Ross, Jr. Kluwer Academic/Plenum Publishers, 2001

7. Y.H. Tang, R.T. Hunt, R. Robertazzi, M.A. Fisher, J. Coughlin, R. Patt, E.K. Track, and E. Potenziani, “Cryocooled Primary Voltage Standard System,” IEEE Trans. on Instrumentation and Measurement, vol. 46, pp. 256-259, 1997.

8. D. Gupta, A.M. Kadin, R.J. Webber, I. Rochwarger, D. Bryce, W.J. Hollander, Y.U. Kim, Channakeshav, R.P. Kraft, J.W. Kim, and J.F. McDonald, Proc. Applied Superconductivity Conference, Houston, Texas, August 2002, to appear in IEEE Trans. on Applied Superconductivity, June 2003.

9. A. Katz, “Linearization: Reducing Distortion in Power Amplifiers, “IEEE Microwave magazine, pp. 37-49 (Dec. 2001).

10. P.B. Kennington, “Linearized Transmitters: An Enabling Technology for Software-Defined Radio,” IEEE Communications magazine, vol. 40, pp. 156-162 (Feb. 2002).

11. FCC ET Docket No. 02-135 & Docket No. 03-237.

12. P. Bunyk, K. Likharev, and D. Zinoviev, “RSFQ Technology: Physics and Devices,” Int. J. High Speed Electron. Syst., vol. 11, pp. 257-305, Mar. 2001.

13. D. K. Brock, E. K. Track, and J. M. Rowell, “Superconductor ICs: The 100 GHz Second Generation,” IEEE Spectr., vol. 37, pp. 40-46, Dec. 2000.

14. K. K. Likharev, O. A. Mukhanov, and V. K. Semenov, “Resistive Single Flux Quantum Logic for the Josephson-junction Digital Technology,” in Proc. SQUID'85, H.-D. Hahlbohm and K. Lübbig, Eds. Berlin, Germany: W. de Gruyter, pp. 1103-1108.

15. O. A. Mukhanov, V. K. Semenov, and K. K. Likharev, “Ultimate Performance of the RSFQ Logic Circuits,” IEEE Trans. Magn., vol. MAG-23, pp. 759-762, Mar. 1987.

16. V. P. Koshelets, K. K. Likharev, V. V. Migulin, O. A. Mukhanov, G. A. Ovsyannikov, V. K. Semenov, I. L. Serpuchenko, and A. N. Vystavkin, “Experimental Realization of a Resistive Single Flux Quantum Logic Circuit,” IEEE Trans. Magn., vol. MAG-23, pp. 755-758, Mar. 1987.

17. D. K. Brock, “RSFQ Technology: Circuits and Systems,” Int. J. High-Speed Electron. Syst., vol. 11, pp. 307-362, Mar. 2001.

18. W. Chen, A. V. Rylyakov, V. Patel, J. E. Lukens, and K. K. Likharev, “Rapid Single Flux Quantum T-flip-flop Operating up to 770 GHz,” IEEE Trans. Appl. Superconduct., vol. 9, pp. 3212-3215, June 1999. for flash analog to digital converter,” IEEE Trans. Appl. Superconduct., vol. 7, pp. 2822-2825, June 1997.

19. A. F. Kirichenko, S. Sarwana, D. Gupta, I. Rochwarger, and O. A. Mukhanov, “Multi-channel Time Digitizing System,” IEEE Trans. Applied Supercond., vol. 13, pp. 454-458, June 2003.

20. A. M. Kadin, C. A. Mancini, M. J. Feldman, and D. K. Brock, “Can RSFQ Logic Circuits Be Scaled to Deep Submicron Dimensions?,” IEEE Trans. Appl. Superconduct., vol. 11, pp. 1050-1055, Mar. 2001.

21. The International Technology Roadmap for Semiconductors (2004). [Online]. Available: http://public.itrs.net.

22. H. Hayakawa, N. Yoshikawa, S. Yorozu, and A. Fujimaki, “Superconducting Digital Electronics,” in Proc. IEEE, vol. 92, Oct. 2004, pp. 1549-1563.

23. O. A. Mukhanov, D. Gupta, A. Kadin, and V. Semenov, “Superconductor Analog-to-Digital Converters,” in Proc. IEEE, vol. 92, Oct 2004, pp. 1564-1565.

Jack Rosa is president and CEO of HYPRES, and vice chairman of the board. A 35-year veteran of the wireless industry, Rosa has served as CEO of HYPRES for the last five years, and was formerly a senior executive at Harris Corporation, leading the company's satellite and electronics businesses. Rosa has developed a number of successful commercial and defense businesses. He earned a BS in Applied Physics from Hofstra University, and an MSEE from the Polytechnic Institute of Brooklyn.

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