RF Design Magazine
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Agilent acquires Xpedion to expand RF CMOS simulation, verification offerings
Aug 3, 2006 4:20 PM  By Ashok Bindra, Editorial Director

Following its strategy of acquisitions and alliances to expand its product portfolio in the EDA space, last week Agilent Technologies inked an agreement to acquire a key provider of RFIC simulation and verification software, Xpedion Design Systems. The agreement merges Xpedion’s R&D team with deep technical skills focused on making fast CMOS RFIC simulators and verification tools with its EEsof EDA division. The closing is expected to complete in a few weeks. Last year, the company acquired Eagleware-Elanix, a provider of easy-to-use PC-based RF synthesis and simulations software to complement its high-end RF design tools.

Also, last April, Xpedion introduced a transistor-level phase-locked loop (PLL) simulation for verifying complete closed-loop noise and jitter, an industry first that the company said allows PLL designers to fully verify their designs prior to silicon, thereby minimizing design spins and cutting time to production. In addition, the company also formed a partnership with Prof. Gennady Gildenblat of Penn State University, who co-developed the PSP model with Philips. The idea was to provide PSP parameter extraction for Xpedion modeling services. Meanwhile, to deliver another major advancement in convergence and speed for RFIC designers, the company has refurbished its flagship product, the GoldenGate. The 3.5 version uses 50% less memory while doubling the speed over the previous version.

"Increasingly, designers are finding that their high-performance RFIC designs are under-characterized," said Jim McGillivary, vice president and general manager of Agilent's EEsof EDA division. "The result is too many foundry turns and poor yield. Agilent is recognized as the leader in RF design and simulation, with proven breadth and depth. By adding Xpedion's products to our portfolio, we will be able to increase our emphasis on design verification and DFM, giving our customers an indispensable design flow covering RFIC design, design verification and DFM."

"Xpedion's outstanding development team will give Agilent an unbeatable, world-class group of scientists committed to innovation," said Larry Lerner, R&D manager at Agilent's EEsof EDA Division.

"Xpedion's and Agilent EEsof's combined technologies are used by almost all key companies designing RFICs," said Pete Rodriguez, Xpedion chief executive officer. "We are pleased to join forces with Agilent because of our shared vision to provide innovative solutions and unparalleled support."

Xpedion has about 36 people on its staff with less than $25 million in revenues. And is a member of the Ready for IBM Technology Program, Cadence Connections Program, the Mathworks Connections Program and the Platform Partners Program, and is a Sun Microsystems development partner.


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