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Automated circuit extraction dramatically speeds complex interconnect modeling Sep 1, 2007 12:00 PM By Michael Heimlich Traditional RF/microwave design approaches no longer meet the challenges of next-generation communication products. An alternative methodology has been developed. Besides describing the new automated circuit extraction (ACE) technology, this article discusses real-world design examples to demonstrate its accuracy and efficiency.
What is ACE?
In reality, ACE technology is an innovative response to the overuse of EM as a design tool. ACE software reclaims parametric design for the user by creating netlist-based representations of complex interconnects using the same networks of parametric models designers themselves would use if they had the time and patience to do so, in a fraction of the time that it would take EM tools to create S-parameters. The speed, accuracy and parametric nature of ACE software enable engineers to return to real design by exploring design alternatives and changes in seconds. Obviously, EM is still a necessary part of the flow, but the ACE tool enables engineers to once again design rather than analyze, even on many of the most challenging RF/microwave designs. While ACE software is based on the proven digital and analog mixed-signal technique of circuit extraction, it also uses microwave models and principles. The tool puts the engineer back into the driver's seat of design by creating circuit models from layout geometries. This tool, like all circuit extractors, creates a model for interconnects by geometrically analyzing a layout through breaking it down into pieces that the extractor understands, mapping each piece of the reduced geometry to a model, and then combining the models intelligently to create a simulated representation. Digital and analog mixed-signal (AMS) extractors typically use RLCK models to model interconnect-reduced geometries, but these require dense networks at microwave frequencies to capture dispersion and skin-effect, and they tend to be bandwidth-limited. On the other hand, ACE views the layout in terms of distributed line, coupled-line, and discontinuity models that microwave engineers have been using for years, such as MLIN and STEE, so dispersion, skin-effect, and bandwidth are non-issues. Moreover, vias can be modeled with S-parameter files from pre-defined via libraries. The tool generates the netlist in seconds for complex arrangements of interconnects that engineers would prefer to make, but either don't have the hours or days to do it or find it too error prone, and/or where EM analysis would take days or even weeks for a single design iteration, provided the computer hardware didn't crash. It uses all of the models designers would use to model complex interconnects if they had the time and the patience. For fast, efficient, and accurate answers it uses closed-form models such as MLIN and SLIN for lines, MTEE for t-junctions, and M2CLIN for coupled lines. Without sacrificing speed, the company's X models, EM table-based models with the accuracy of EM and the speed of closed-form models, can be used for discontinuities. For the most accurate answers, designers can direct the ACE tool to use models that have finite element method (FEM) solvers built right in that are highly optimized to solve that particular geometry. GFMCLIN, for example, has an FEM solver inside, which turns the parametric descriptions into geometries solved by its FEM solver in a fraction of the time of generalized, three-dimensional (3-D) FEM tools. Designers now have the choice to trade off the difference between speed and degree of accuracy when they chose to have ACE use method-of-moments (MoM) solvers — faster than the FEM-based circuit models such as GFMCLIN and more accurate than the closed-form models such as M2CLIN. The same geometries that were sent to an EM solver in the past can now be sent to ACE. Throughout the design flow, ACE software can be used, in conjunction with EM-based discontinuity and coupled line models, to design and refine. The same geometries that are sent to this tool during design can then be sent, capacity permitting, to any one of the EM solvers (CST, Flomerics, Sonnet, or Zeland) integrated into AWR's EM Socket II tool for verification.
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