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How to best marry time-domain system-level verification with frequency-domain RF circuit simulations Sep 1, 2006 12:00 PM By Ashok Bindra, Editorial Director This article is a discussion based on a panel presented at the IEEE MTT-S International Microwave Symposium in San Francisco, Calif. RF Design posed six questions to six panelists on the topic of system-level verification of RF circuits and compiled their responses. The panel discusses the pros and cons of various methods that enable system-level verification of RF circuits.
Question 4: System-level test harnesses can be built, but are generally time-domain baseband-complex models where transient behavior is important. Circuit simulators, on the other hand, tend to be frequency domain, passband and steady state. Time domain and frequency domain are theoretically a duality, but as a practical matter, merging these domains is tricky. How best to bring these two domains together and eliminate those sleepless nights after tape-out? What methods and methods of computation are out there, and what is on the horizon? Warwick: One cost-effective method is to create a baseband complex equivalent time-domain model from frequency-domain S parameters, noise data, and AM/AM and AM/PM tables. However, there are more sophisticated modeling methods in two broad categories: physically based models and data-driven or “black box” models. Examples of the former are rational function fitting and polyharmonic distortion. Examples of the latter are Volterra series, non-linear system identification, and neural networks. It's an active field of research. I'd refer the reader to the journals: IEEE Transactions On Microwave Theory and Techniques that recently had a special issue (August 2006) on this topic. Hartung: First, the development of a comprehensive simulation strategy, which in turn leads to a modeling plan, is key, since modeling is as important as the simulation itself. Therefore, it is essential that the underlying multimode simulation solution is language neutral (from system models in C/C++, SystemC, SystemVerilog to digital/mixed signal/analog behavioral HDL languages, down to Spice) and provides different, but tightly integrated engines and algorithms dedicated to the specific needs for a multidomain circuit design. For example, an envelope algorithm that works together with a FastSpice engine and AMS and digital behavioral models. Here, it is important that the envelope algorithm will only be applied to the RF front-end section of the design, whereas for the analog baseband more efficient pure transient algorithms are used. Niehof: With respect to including RF layout effects in time-domain simulation we see new developments in the area of S parameter to equivalent circuit generation tools. We have now seen tooling that is able to generate passive and stable models, thus allowing time-domain simulation. In general, we would try and find a way to describe the time-domain impact of the RF (frequency domain) impairments, on a high level, then combine by running algorithms in MATLAB. Kanaglekar: In order to verify an RF circuit-level block in a system-level test harness, a commonly employed technique is to generate an in-phase and quadrature (I and Q) time-domain model of the circuit from its AM to AM and AM to PM non-linear behavior by simulating the circuit using the harmonic balance technique. If the system test requires a complex modulated signal, then the circuit-level block is simulated using the envelope technique. Either way, the system-level blocks described in time or numeric domain can then be co-simulated with the circuit-level blocks by using digital or DSP simulation algorithms such as event-driven or synchronous data flow at the system level and harmonic balance or circuit envelope at the RF circuit level.
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