Question 5: Broadly speaking, each method can be characterized by parameters such as speed and fidelity. For a given compute power you have trade-off between fidelity and speed. I can imagine a set of methods that lie on an “efficient frontier” (see figure on p. 26). So the question is, “What are the most interesting points on that “efficient frontier?”

Warwick: On the whole, the fast methods are best for system-level verification. You simply can't run enough symbols through a transistor-level simulator to get a meaningful answer to system-level questions like BER. Therefore, verification model extraction seems to be the most valuable.

Hartung: During the project you will go through all points. After the realization of a first high-level executable specification, this behavioral setup then serves as the basis to facilitate mixed-level simulations, where blocks can be inserted at transistor level and verified in a top-level context. This full chip and system setup can serve as the regression template to allow for continuous verification as blocks mature, allowing for a continuous evolution approach through the entire design. But, the majority of the design work will probably produce a “meet in the middle” approach, where the top down and bottom up processes work in parallel.

Niehof: This strongly depends on the type of design and its issues. Within Philips all mentioned techniques are applied.

Kanaglekar: I agree that today for a given compute power, fast methods using behavioral model generation are the best for component-level verification with complex wireless performance specs such as BER, CCDF, etc. For system-level verification with multiple RF blocks/functions, the designer should be able to abstract blocks of choice at a behavioral level by keeping the other blocks at the transistor-level. This way, the designer can cycle through all the blocks keeping some at the transistor level and some at a behavioral level. However, a simulator should be able to automatically extract a suitable behavioral-level model for a user-specified block; i.e., it should be an “on-the-fly” behavioral model creation process without requiring the user to first extract a behavioral model manually and then to use it in the overall system-level simulation.

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