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Until the late 1980s, military requirements tended to drive data converter markets. Military needs were driven by radar, communications applications and electromagnetic pulse detection. By 1991, a Mitre scientist, Joseph Mitola, foresaw that the majority of a radio's functionality in the not-too-distant future would be in software rather than hardware, thereby enabling the transceiver to process multiple standards either in sequence or in parallel. By the mid-1990s, semiconductor technology had reached the point where commercial interests drew these same conclusions and began seeking technology specifically for this purpose.

From a business point of view, cellular and other advanced consumer wireless growth further strengthened the demand for software-defined radio (SDR) technology. While there is still a gap in the required level of performance for a generic SDR platform, many communications applications have been slowly adopting various aspects of SDR. These include digital functions such as the modem, and usage of Internet protocol (IP) for streaming of real-time communications data. Both of these can be changed in real time as the requirements dictate. Furthermore, the analog functionality of the transceivers has begun evolving into a structure that can simultaneously process entire bands or frequency allocations. The result is a transceiver that can change modulation characteristics without physical hardware changes, potentially handling multiple RF signals at the same time. The importance of this is that as standards evolve, the hardware can remain the same, with only the software being updated. Indeed, the value added is more often than not in the software, not in the hardware.

The demand for SDR goes beyond military applications to the heart of everyday communications. Standards such as GSM, 3G, WiMAX and future standards, are constantly evolving. This drives a churn of operating equipment at a time when operators are trying to contain capital expenses. Other standards beyond cellular are also changing including video (broadcast, cable and satellite) and audio services (AM, FM, HD radio and satellite standards). Equipment that can evolve as the standards do is highly valued at an industrial level as well as a consumer level.

Despite the quiet adoption of key techniques of SDR that was accelerated by DSP and FPGA developments, analog performance gaps prevent full adoption and usage of SDR in many common appli-cations. While exact requirements depend on the application and design assumptions, the key requirements are improved noise performance and higher intermodulation and spurious performance. While RF and linear devices have improved rapidly in recent years with the introduction of GaAs, SiGe and other advanced processes, mixed-signal devices such as ADCs and DACs have not improved quite as fast. For ADCs and DACs alike, the requirements are focused on noise and distortion. While ADCs most often focus on SNR and spurious-free dynamic range (SFDR), DACs are often specified by noise spectral density (NSD), adjacent-channel leakage ratio (ACLR), or adjacent-channel power ratio (ACPR).

Converter specifications encompass many important dimensions of performance. In addition to noise and distortion, as previously outlined, other requirements such as sample rate and bandwidth are important. Sample rates need to adequately match the application bandwidths to satisfy Nyquist. Beyond this, oversampling can be important as a way to drive down noise density, but is not strictly necessary provided Nyquist is satisfied. Current sample rates and advances in sample rate are on track with demands. Bandwidth, on the other hand, is always less than required. New systems are always looking for the ability to sample (in the case of the ADC) or synthesize (in the case of the DAC) higher frequencies — not only for higher IFs, but also for direct-RF sampling and synthesis. Direct-RF sampling may well be the key to greatly simplified systems and lower cost.

Operating data converters at high analog frequencies comes with a penalty. Noise and distortion performance is predictably worse due to clock jitter and limited slew rate. Much of the innovation over the last decade of high-speed converter development has focused on improving the operation of converters at higher analog frequencies. So, for example, while SFDR has not improved significantly over the last 10 years^[1], input bandwidth has. As a result, converters are now available that give IF performance that once was available only at baseband or low frequencies. Figure 1 shows the combined improvement in ADC bandwidth and SFDR. This chart clearly shows how performance for IF-sampling converters continues to improve.

Most high-speed ADCs use a capacitor to sample the input signal. This creates a natural filter composed of a resistor equal to the on resistance of the sampling switch, and the sampling capacitor. ADC bandwidth is, therefore, limited by the size of the capacitor, as shown in Equation 1. Making the capacitor smaller makes the circuit easier to drive, increasing the bandwidth and improving the spurious performance.

where BW is the converter bandwidth. This creates an interesting trade off. In addition to improved spurious performance and a wider input bandwidth, the circuit allows more noise to pass to the sample capacitor. This results in a lower ADC SNR due to increased input noise, as shown in equation 2.

Despite this, SNR has remained relatively flat while input band-width has increased, until recent years as noted in reference 1. Converting SNR to NSD by distributing the noise over the Nyquist bandwidth generates a key parameter used by system designers. The NSD of high-speed converters shows consistent improvement over time and results in a steady growth of about 1 dB/Hz per year. This translates into improved receive sensitivity and results in more usable dynamic range in the SDR design.

What is needed from a wideband, high-speed ADC in order to implement SDR in a general application? This is gated by GSM, which is generally considered to be the most demanding application. This happens to be a good reference point because the requirements for GSM are similar to that of a broadcast FM receiver in terms of bandwidth, sensitivity and rejection of blockers. These two would never be implemented together, but they represent two different applications that possess similar requirements.

From prior analysis^[2], NSD for GSM must be on the order of -157 dBm/Hz, or about 86 decibels full scale (dBFS), from a typical high-speed converter. Spurious performance needs to be about -110 dBFS. From Figures 1 and 2, it is apparent that the required level of performance is not yet available. However, it is clear that the trend is in the right direction and that the required performance should be available in the next generation or so. In the mean time, products such as the AD9461 16-bit, 130 Msps pipelined ADC will find use in many high-performance applications. In other applications, higher levels of integration are sought. Products such as the AD6655 IF diversity receiver offer high-performance receiver functions, including ADCs, along with digital tuners and power detection to aid in AGC loop construction. Because of the wide dynamic range required for SDR systems, AGC is very critical. On one sample, the input signals may be near the noise floor. Then, within a few samples, the input is driven fast toward the full scale of the converter. An AGC loop is typically required to maintain the largest signal possible on the input, yet must also respond to sudden increases in signal level to prevent clipping of the receiver input. Devices such as the AD6655 and AD9641 are designed to provide advance notice so that loops can respond before signal integrity is lost or before the inputs are damaged.

From a DAC perspective, the key requirements are NSD and spurious products, specifically, those for continuous wave (CW), ACPR or ACLR. To meet emissions requirements, spurious products typically need to be about -75 dBFS. Figure 3 shows that this is not a problem for current-generation DACs. Noise, on the other hand, can be an issue. Because SDR applications tend to be wideband in nature, the output of the power amplifier must also be wideband. In addition, if the system employs digital pre-distortion, the output bandwidth must be as wide as the spurious products being corrected. Therefore, any noise generated in the system will be amplified and presented at the output. Excess noise in the DAC would be passed to the antenna and translated as excess RF noise. Therefore, system noise, including that of the DAC, must be minimal. Current state-of-the art modulators (used in direct launch transmit) have about -156 dBm or better output noise density. Ideally, the DAC should be at this level or be low to prevent a significant increase to overall system noise. From Figure 4, DAC noise is clearly below that of modulators and mixers. Based on current technology, DACs are much less a bottleneck to SDR than are ADCs.

In addition to these improvements, other factors not only enhance performance but also improve usability. Integration is playing a significant factor in standard product converter enhancements. Recent years have seen added digital functions in ADCs and DACs. Not uncommon in converters are digital filters, interpolators, decimators, numeric-controlled oscillators (NCOs) and other functions that aid in receive and transmit operations. NCOs and digital filters aid not only in the channelization of the signals, but facilitate block conversion. For example, NCOs in a DAC, when combined with interpolation, allow the original baseband signal to be translated anywhere in the Nyquist band of the interpolated sample rate instead of being confined by the original sample rate. New products such as the AD9736 14-bit, 1200 MHz DAC are available with sample rates in the gigahertz range, allowing synthesis of very high IF and, in some cases, direct-RF synthesis of transmitted signals. Similar features exist on ADCs. An on-chip NCO and demodulator can be used to translate an arbitrary IF signal to be down-sampled to a digital baseband signal. Because the original signal is IF-sampled and digitally converted to baseband, no quadrature error or dc-offset error is introduced.

An additional benefit to on-chip decimators on ADCs and interpolators on DACs is that the external interface speed can be considerable lowered. This allows slower logic families to be used and reduces switching speed requirements, resulting in lower overall noise and spurious generated in the data converters and in the layout surrounding them. The net results are often better performance of the overall system.

While a generic SDR solution is not yet available for complete transceivers, many of the aspects are being adopted in new transceiver designs. Despite current bottlenecks, the performance curves show that converter performance has steadily improved and is within a generation or two of meeting the required levels. At the same time, levels of integration of these converters are increasing, not only to simplify designs, but as a means to improve performance of the converter as well as in the systems in which they reside. Next-generation converters will close the gap in performance as well as functionality. RFD

1. State of the Art in ADCs 2007, www.converter-radio.com.

2. Multicarrier GSM Requirements, www.converter-radio.com.

Brad Brannon is a systems applications engineer for the high-speed converters group of Analog Devices. He has been with ADI since 1984 and specializes in analog to digital converters and wireless systems. He graduated for NC State with a BS in electrical engineering in 1983.

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